src/tuner_r820t.c

   1 /*
   2  * R820T tuner driver, taken from Realteks RTL2832U Linux Kernel Driver
   3  *
   4  * This driver is a mess, and should be cleaned up/rewritten.
   5  *
   6  */
   7
   8 #include <stdint.h>
   9 #include <stdio.h>
  10
  11 #include "rtlsdr_i2c.h"
  12 #include "tuner_r820t.h"
  13
  14 int r820t_SetRfFreqHz(void *pTuner, unsigned long RfFreqHz)
  15 {
  16         R828_Set_Info R828Info;
  17
  18 //      if(pExtra->IsStandardModeSet==NO)
  19 //              goto error_status_set_tuner_rf_frequency;
  20
  21 //      R828Info.R828_Standard = (R828_Standard_Type)pExtra->StandardMode;
  22         R828Info.R828_Standard = (R828_Standard_Type)DVB_T_6M;
  23         R828Info.RF_Hz = (UINT32)(RfFreqHz);
  24         R828Info.RF_KHz = (UINT32)(RfFreqHz/1000);
  25
  26         if(R828_SetFrequency(pTuner, R828Info, NORMAL_MODE) != RT_Success)
  27                 return FUNCTION_ERROR;
  28
  29         return FUNCTION_SUCCESS;
  30 }
  31
  32 int r820t_SetStandardMode(void *pTuner, int StandardMode)
  33 {
  34         if(R828_SetStandard(pTuner, (R828_Standard_Type)StandardMode) != RT_Success)
  35                 return FUNCTION_ERROR;
  36
  37         return FUNCTION_SUCCESS;
  38 }
  39
  40 int r820t_SetStandby(void *pTuner, int LoopThroughType)
  41 {
  42
  43         if(R828_Standby(pTuner, (R828_LoopThrough_Type)LoopThroughType) != RT_Success)
  44                 return FUNCTION_ERROR;
  45
  46         return FUNCTION_SUCCESS;
  47 }
  48
  49 // The following context is implemented for R820T source code.
  50
  51 /* just reverses the bits of a byte */
  52 int
  53 r820t_Convert(int InvertNum)
  54 {
  55         int ReturnNum;
  56         int AddNum;
  57         int BitNum;
  58         int CountNum;
  59
  60         ReturnNum = 0;
  61         AddNum    = 0x80;
  62         BitNum    = 0x01;
  63
  64         for(CountNum = 0;CountNum < 8;CountNum ++)
  65         {
  66                 if(BitNum & InvertNum)
  67                         ReturnNum += AddNum;
  68
  69                 AddNum /= 2;
  70                 BitNum *= 2;
  71         }
  72
  73         return ReturnNum;
  74 }
  75
  76 R828_ErrCode
  77 I2C_Write_Len(void *pTuner, R828_I2C_LEN_TYPE *I2C_Info)
  78 {
  79         unsigned char DeviceAddr;
  80
  81         unsigned int i, j;
  82
  83         unsigned char RegStartAddr;
  84         unsigned char *pWritingBytes;
  85         unsigned long ByteNum;
  86
  87         unsigned char WritingBuffer[128];
  88         unsigned long WritingByteNum, WritingByteNumMax, WritingByteNumRem;
  89         unsigned char RegWritingAddr;
  90
  91         // Get regiser start address, writing bytes, and byte number.
  92         RegStartAddr  = I2C_Info->RegAddr;
  93         pWritingBytes = I2C_Info->Data;
  94         ByteNum       = (unsigned long)I2C_Info->Len;
  95
  96         // Calculate maximum writing byte number.
  97 //      WritingByteNumMax = pBaseInterface->I2cWritingByteNumMax - LEN_1_BYTE;
  98         WritingByteNumMax = 2 - 1; //9 orig
  99
 100         // Set tuner register bytes with writing bytes.
 101         // Note: Set tuner register bytes considering maximum writing byte number.
 102         for(i = 0; i < ByteNum; i += WritingByteNumMax)
 103         {
 104                 // Set register writing address.
 105                 RegWritingAddr = RegStartAddr + i;
 106
 107                 // Calculate remainder writing byte number.
 108                 WritingByteNumRem = ByteNum - i;
 109
 110                 // Determine writing byte number.
 111                 WritingByteNum = (WritingByteNumRem > WritingByteNumMax) ? WritingByteNumMax : WritingByteNumRem;
 112
 113                 // Set writing buffer.
 114                 // Note: The I2C format of tuner register byte setting is as follows:
 115                 //       start_bit + (DeviceAddr | writing_bit) + RegWritingAddr + writing_bytes (WritingByteNum bytes) +
 116                 //       stop_bit
 117                 WritingBuffer[0] = RegWritingAddr;
 118
 119                 for(j = 0; j < WritingByteNum; j++)
 120                         WritingBuffer[j+1] = pWritingBytes[i + j];
 121
 122                 // Set tuner register bytes with writing buffer.
 123 //              if(pI2cBridge->ForwardI2cWritingCmd(pI2cBridge, DeviceAddr, WritingBuffer, WritingByteNum + LEN_1_BYTE) !=
 124 //                      FUNCTION_SUCCESS)
 125 //                      goto error_status_set_tuner_registers;
 126
 127                 if (rtlsdr_i2c_write_fn(pTuner, R820T_I2C_ADDR, WritingBuffer, WritingByteNum + 1) < 0)
 128                         return RT_Fail;
 129         }
 130
 131         return RT_Success;
 132 }
 133
 134 R828_ErrCode
 135 I2C_Read_Len(void *pTuner, R828_I2C_LEN_TYPE *I2C_Info)
 136 {
 137         uint8_t DeviceAddr;
 138
 139         unsigned int i;
 140
 141         uint8_t RegStartAddr;
 142         uint8_t ReadingBytes[128];
 143         unsigned long ByteNum;
 144
 145         // Get regiser start address, writing bytes, and byte number.
 146         RegStartAddr  = 0x00;
 147         ByteNum       = (unsigned long)I2C_Info->Len;
 148
 149         // Set tuner register reading address.
 150         // Note: The I2C format of tuner register reading address setting is as follows:
 151         //       start_bit + (DeviceAddr | writing_bit) + RegReadingAddr + stop_bit
 152 //      if(pI2cBridge->ForwardI2cWritingCmd(pI2cBridge, DeviceAddr, &RegStartAddr, LEN_1_BYTE) != FUNCTION_SUCCESS)
 153 //              goto error_status_set_tuner_register_reading_address;
 154
 155         if (rtlsdr_i2c_write_fn(pTuner, R820T_I2C_ADDR, &RegStartAddr, 1) < 0)
 156                 return RT_Fail;
 157
 158         // Get tuner register bytes.
 159         // Note: The I2C format of tuner register byte getting is as follows:
 160         //       start_bit + (DeviceAddr | reading_bit) + reading_bytes (ReadingByteNum bytes) + stop_bit
 161 //      if(pI2cBridge->ForwardI2cReadingCmd(pI2cBridge, DeviceAddr, ReadingBytes, ByteNum) != FUNCTION_SUCCESS)
 162 //              goto error_status_get_tuner_registers;
 163
 164         if (rtlsdr_i2c_read_fn(pTuner, R820T_I2C_ADDR, ReadingBytes, ByteNum) < 0)
 165                 return RT_Fail;
 166
 167         for(i = 0; i<ByteNum; i++)
 168         {
 169                 I2C_Info->Data[i] = (UINT8)r820t_Convert(ReadingBytes[i]);
 170         }
 171
 172
 173         return RT_Success;
 174
 175
 176 error_status_get_tuner_registers:
 177 error_status_set_tuner_register_reading_address:
 178
 179         return RT_Fail;
 180 }
 181
 182 R828_ErrCode
 183 I2C_Write(void *pTuner, R828_I2C_TYPE *I2C_Info)
 184 {
 185         uint8_t WritingBuffer[2];
 186
 187         // Set writing bytes.
 188         // Note: The I2C format of tuner register byte setting is as follows:
 189         //       start_bit + (DeviceAddr | writing_bit) + addr + data + stop_bit
 190         WritingBuffer[0] = I2C_Info->RegAddr;
 191         WritingBuffer[1] = I2C_Info->Data;
 192
 193         // Set tuner register bytes with writing buffer.
 194 //      if(pI2cBridge->ForwardI2cWritingCmd(pI2cBridge, DeviceAddr, WritingBuffer, LEN_2_BYTE) != FUNCTION_SUCCESS)
 195 //              goto error_status_set_tuner_registers;
 196
 197 //      printf("called %s: %02x -> %02x\n", __FUNCTION__, WritingBuffer[0], WritingBuffer[1]);
 198
 199         if (rtlsdr_i2c_write_fn(pTuner, R820T_I2C_ADDR, WritingBuffer, 2) < 0)
 200                 return RT_Fail;
 201
 202         return RT_Success;
 203 }
 204
 205 void
 206 R828_Delay_MS(
 207         void *pTuner,
 208         unsigned long WaitTimeMs
 209         )
 210 {
 211         /* simply don't wait for now */
 212         return;
 213 }
 214
 215 //-----------------------------------------------------
 216 //
 217 // Filename: R820T.c
 218 //
 219 // This file is R820T tuner driver
 220 // Copyright 2011 by Rafaelmicro., Inc.
 221 //
 222 //-----------------------------------------------------
 223
 224
 225 //#include "stdafx.h"
 226 //#include "R828.h"
 227 //#include "..\I2C_Sys.h"
 228
 229
 230 #if(TUNER_CLK_OUT==TRUE)  //enable tuner clk output for share Xtal application
 231 UINT8 R828_iniArry[27] = {0x83, 0x32, 0x75, 0xC0, 0x40, 0xD6, 0x6C, 0xF5, 0x63,
 232                                         /*     0x05  0x06  0x07  0x08  0x09  0x0A  0x0B  0x0C  0x0D                                                    */
 233
 234                                                    0x75, 0x68, 0x6C, 0x83, 0x80, 0x00, 0x0F, 0x00, 0xC0,//xtal_check
 235                                         /*     0x0E  0x0F  0x10  0x11  0x12  0x13  0x14  0x15  0x16                                                    */
 236
 237                                                    0x30, 0x48, 0xCC, 0x60, 0x00, 0x54, 0xAE, 0x4A, 0xC0};
 238                                         /*     0x17  0x18  0x19  0x1A  0x1B  0x1C  0x1D  0x1E  0x1F                                                    */
 239 #else
 240 UINT8 R828_iniArry[27] = {0x83, 0x32, 0x75, 0xC0, 0x40, 0xD6, 0x6C, 0xF5, 0x63,
 241                                         /*     0x05  0x06  0x07  0x08  0x09  0x0A  0x0B  0x0C  0x0D                                                    */
 242
 243                                                    0x75, 0x78, 0x6C, 0x83, 0x80, 0x00, 0x0F, 0x00, 0xC0,//xtal_check
 244                                         /*     0x0E  0x0F  0x10  0x11  0x12  0x13  0x14  0x15  0x16                                                    */
 245
 246                                                    0x30, 0x48, 0xCC, 0x60, 0x00, 0x54, 0xAE, 0x4A, 0xC0};
 247                                         /*     0x17  0x18  0x19  0x1A  0x1B  0x1C  0x1D  0x1E  0x1F                                                    */
 248 #endif
 249
 250 UINT8 R828_ADDRESS=0x34;
 251 UINT8 Rafael_Chip = R820T;
 252 //----------------------------------------------------------//
 253 //                   Internal Structs                       //
 254 //----------------------------------------------------------//
 255 typedef struct _R828_SectType
 256 {
 257         UINT8 Phase_Y;
 258         UINT8 Gain_X;
 259         UINT16 Value;
 260 }R828_SectType;
 261
 262 typedef enum _BW_Type
 263 {
 264         BW_6M = 0,
 265         BW_7M,
 266         BW_8M,
 267         BW_1_7M,
 268         BW_10M,
 269         BW_200K
 270 }BW_Type;
 271
 272 typedef struct _Sys_Info_Type
 273 {
 274         UINT16          IF_KHz;
 275         BW_Type         BW;
 276         UINT32          FILT_CAL_LO;
 277         UINT8           FILT_GAIN;
 278         UINT8           IMG_R;
 279         UINT8           FILT_Q;
 280         UINT8           HP_COR;
 281         UINT8       EXT_ENABLE;
 282         UINT8       LOOP_THROUGH;
 283         UINT8       LT_ATT;
 284         UINT8       FLT_EXT_WIDEST;
 285         UINT8       POLYFIL_CUR;
 286 }Sys_Info_Type;
 287
 288 typedef struct _Freq_Info_Type
 289 {
 290         UINT8           OPEN_D;
 291         UINT8           RF_MUX_PLOY;
 292         UINT8           TF_C;
 293         UINT8           XTAL_CAP20P;
 294         UINT8           XTAL_CAP10P;
 295         UINT8           XTAL_CAP0P;
 296         UINT8           IMR_MEM;
 297 }Freq_Info_Type;
 298
 299 typedef struct _SysFreq_Info_Type
 300 {
 301         UINT8           LNA_TOP;
 302         UINT8           LNA_VTH_L;
 303         UINT8           MIXER_TOP;
 304         UINT8           MIXER_VTH_L;
 305         UINT8      AIR_CABLE1_IN;
 306         UINT8      CABLE2_IN;
 307         UINT8           PRE_DECT;
 308         UINT8      LNA_DISCHARGE;
 309         UINT8      CP_CUR;
 310         UINT8      DIV_BUF_CUR;
 311         UINT8      FILTER_CUR;
 312 }SysFreq_Info_Type;
 313
 314 //----------------------------------------------------------//
 315 //                   Internal Parameters                    //
 316 //----------------------------------------------------------//
 317 enum XTAL_CAP_VALUE
 318 {
 319         XTAL_LOW_CAP_30P = 0,
 320         XTAL_LOW_CAP_20P,
 321         XTAL_LOW_CAP_10P,
 322         XTAL_LOW_CAP_0P,
 323         XTAL_HIGH_CAP_0P
 324 };
 325 UINT8 R828_Arry[27];
 326 R828_SectType IMR_Data[5] = {
 327                                                   {0, 0, 0},
 328                                                   {0, 0, 0},
 329                                                   {0, 0, 0},
 330                                                   {0, 0, 0},
 331                                                   {0, 0, 0}
 332                                                 };//Please keep this array data for standby mode.
 333 R828_I2C_TYPE  R828_I2C;
 334 R828_I2C_LEN_TYPE R828_I2C_Len;
 335
 336 UINT32 R828_IF_khz;
 337 UINT32 R828_CAL_LO_khz;
 338 UINT8  R828_IMR_point_num;
 339 UINT8  R828_IMR_done_flag = FALSE;
 340 UINT8  R828_Fil_Cal_flag[STD_SIZE];
 341 static UINT8 R828_Fil_Cal_code[STD_SIZE];
 342
 343 static UINT8 Xtal_cap_sel = XTAL_LOW_CAP_0P;
 344 static UINT8 Xtal_cap_sel_tmp = XTAL_LOW_CAP_0P;
 345 //----------------------------------------------------------//
 346 //                   Internal static struct                 //
 347 //----------------------------------------------------------//
 348 static SysFreq_Info_Type SysFreq_Info1;
 349 static Sys_Info_Type Sys_Info1;
 350 //static Freq_Info_Type R828_Freq_Info;
 351 static Freq_Info_Type Freq_Info1;
 352 //----------------------------------------------------------//
 353 //                   Internal Functions                     //
 354 //----------------------------------------------------------//
 355 R828_ErrCode R828_Xtal_Check(void *pTuner);
 356 R828_ErrCode R828_InitReg(void *pTuner);
 357 R828_ErrCode R828_IMR_Prepare(void *pTuner);
 358 R828_ErrCode R828_IMR(void *pTuner, UINT8 IMR_MEM, int IM_Flag);
 359 R828_ErrCode R828_PLL(void *pTuner, UINT32 LO_Freq, R828_Standard_Type R828_Standard);
 360 R828_ErrCode R828_MUX(void *pTuner, UINT32 RF_KHz);
 361 R828_ErrCode R828_IQ(void *pTuner, R828_SectType* IQ_Pont);
 362 R828_ErrCode R828_IQ_Tree(void *pTuner, UINT8 FixPot, UINT8 FlucPot, UINT8 PotReg, R828_SectType* CompareTree);
 363 R828_ErrCode R828_CompreCor(R828_SectType* CorArry);
 364 R828_ErrCode R828_CompreStep(void *pTuner, R828_SectType* StepArry, UINT8 Pace);
 365 R828_ErrCode R828_Muti_Read(void *pTuner, UINT8 IMR_Reg, UINT16* IMR_Result_Data);
 366 R828_ErrCode R828_Section(void *pTuner, R828_SectType* SectionArry);
 367 R828_ErrCode R828_F_IMR(void *pTuner, R828_SectType* IQ_Pont);
 368 R828_ErrCode R828_IMR_Cross(void *pTuner, R828_SectType* IQ_Pont, UINT8* X_Direct);
 369
 370 Sys_Info_Type R828_Sys_Sel(R828_Standard_Type R828_Standard);
 371 Freq_Info_Type R828_Freq_Sel(UINT32 RF_freq);
 372 SysFreq_Info_Type R828_SysFreq_Sel(R828_Standard_Type R828_Standard,UINT32 RF_freq);
 373
 374 R828_ErrCode R828_Filt_Cal(void *pTuner, UINT32 Cal_Freq,BW_Type R828_BW);
 375 //R828_ErrCode R828_SetFrequency(void *pTuner, R828_Set_Info R828_INFO, R828_SetFreq_Type R828_SetFreqMode);
 376
 377 Sys_Info_Type R828_Sys_Sel(R828_Standard_Type R828_Standard)
 378 {
 379         Sys_Info_Type R828_Sys_Info;
 380
 381         switch (R828_Standard)
 382         {
 383
 384         case DVB_T_6M:
 385         case DVB_T2_6M:
 386                 R828_Sys_Info.IF_KHz=3570;
 387                 R828_Sys_Info.BW=BW_6M;
 388                 R828_Sys_Info.FILT_CAL_LO=56000; //52000->56000
 389                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 390                 R828_Sys_Info.IMG_R=0x00;               //image negative
 391                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 392                 R828_Sys_Info.HP_COR=0x6B;              // 1.7M disable, +2cap, 1.0MHz
 393                 R828_Sys_Info.EXT_ENABLE=0x60;  //R30[6]=1 ext enable; R30[5]:1 ext at LNA max-1
 394                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 395                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 396                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 397                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 398                 break;
 399
 400         case DVB_T_7M:
 401         case DVB_T2_7M:
 402                 R828_Sys_Info.IF_KHz=4070;
 403                 R828_Sys_Info.BW=BW_7M;
 404                 R828_Sys_Info.FILT_CAL_LO=60000;
 405                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 406                 R828_Sys_Info.IMG_R=0x00;               //image negative
 407                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 408                 R828_Sys_Info.HP_COR=0x2B;              // 1.7M disable, +1cap, 1.0MHz
 409                 R828_Sys_Info.EXT_ENABLE=0x60;  //R30[6]=1 ext enable; R30[5]:1 ext at LNA max-1
 410                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 411                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 412                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 413                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 414                 break;
 415
 416         case DVB_T_7M_2:
 417         case DVB_T2_7M_2:
 418                 R828_Sys_Info.IF_KHz=4570;
 419                 R828_Sys_Info.BW=BW_7M;
 420                 R828_Sys_Info.FILT_CAL_LO=63000;
 421                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 422                 R828_Sys_Info.IMG_R=0x00;               //image negative
 423                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 424                 R828_Sys_Info.HP_COR=0x2A;              // 1.7M disable, +1cap, 1.25MHz
 425                 R828_Sys_Info.EXT_ENABLE=0x60;  //R30[6]=1 ext enable; R30[5]:1 ext at LNA max-1
 426                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 427                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 428                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 429                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 430                 break;
 431
 432         case DVB_T_8M:
 433         case DVB_T2_8M:
 434                 R828_Sys_Info.IF_KHz=4570;
 435                 R828_Sys_Info.BW=BW_8M;
 436                 R828_Sys_Info.FILT_CAL_LO=68500;
 437                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 438                 R828_Sys_Info.IMG_R=0x00;               //image negative
 439                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 440                 R828_Sys_Info.HP_COR=0x0B;              // 1.7M disable, +0cap, 1.0MHz
 441                 R828_Sys_Info.EXT_ENABLE=0x60;  //R30[6]=1 ext enable; R30[5]:1 ext at LNA max-1
 442                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 443                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 444                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 445                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 446                 break;
 447
 448         case ISDB_T:
 449                 R828_Sys_Info.IF_KHz=4063;
 450                 R828_Sys_Info.BW=BW_6M;
 451                 R828_Sys_Info.FILT_CAL_LO=59000;
 452                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 453                 R828_Sys_Info.IMG_R=0x00;               //image negative
 454                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 455                 R828_Sys_Info.HP_COR=0x6A;              // 1.7M disable, +2cap, 1.25MHz
 456                 R828_Sys_Info.EXT_ENABLE=0x40;  //R30[6], ext enable; R30[5]:0 ext at LNA max
 457                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 458                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 459                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 460                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 461                 break;
 462
 463         default:  //DVB_T_8M
 464                 R828_Sys_Info.IF_KHz=4570;
 465                 R828_Sys_Info.BW=BW_8M;
 466                 R828_Sys_Info.FILT_CAL_LO=68500;
 467                 R828_Sys_Info.FILT_GAIN=0x10;  //+3dB, 6MHz on
 468                 R828_Sys_Info.IMG_R=0x00;               //image negative
 469                 R828_Sys_Info.FILT_Q=0x10;              //R10[4]:low Q(1'b1)
 470                 R828_Sys_Info.HP_COR=0x0D;              // 1.7M disable, +0cap, 0.7MHz
 471                 R828_Sys_Info.EXT_ENABLE=0x60;  //R30[6]=1 ext enable; R30[5]:1 ext at LNA max-1
 472                 R828_Sys_Info.LOOP_THROUGH=0x00; //R5[7], LT ON
 473                 R828_Sys_Info.LT_ATT=0x00;       //R31[7], LT ATT enable
 474                 R828_Sys_Info.FLT_EXT_WIDEST=0x00;//R15[7]: FLT_EXT_WIDE OFF
 475                 R828_Sys_Info.POLYFIL_CUR=0x60;  //R25[6:5]:Min
 476                 break;
 477
 478         }
 479
 480         return R828_Sys_Info;
 481 }
 482
 483 Freq_Info_Type R828_Freq_Sel(UINT32 LO_freq)
 484 {
 485         Freq_Info_Type R828_Freq_Info;
 486
 487         if(LO_freq<50000)
 488         {
 489                 R828_Freq_Info.OPEN_D=0x08; // low
 490                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 491                 R828_Freq_Info.TF_C=0xDF;     //R27[7:0]  band2,band0
 492                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 493                 R828_Freq_Info.XTAL_CAP10P=0x01;
 494                 R828_Freq_Info.XTAL_CAP0P=0x00;
 495                 R828_Freq_Info.IMR_MEM = 0;
 496         }
 497
 498         else if(LO_freq>=50000 && LO_freq<55000)
 499         {
 500                 R828_Freq_Info.OPEN_D=0x08; // low
 501                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 502                 R828_Freq_Info.TF_C=0xBE;     //R27[7:0]  band4,band1
 503                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 504                 R828_Freq_Info.XTAL_CAP10P=0x01;
 505                 R828_Freq_Info.XTAL_CAP0P=0x00;
 506                 R828_Freq_Info.IMR_MEM = 0;
 507         }
 508         else if( LO_freq>=55000 && LO_freq<60000)
 509         {
 510                 R828_Freq_Info.OPEN_D=0x08; // low
 511                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 512                 R828_Freq_Info.TF_C=0x8B;     //R27[7:0]  band7,band4
 513                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 514                 R828_Freq_Info.XTAL_CAP10P=0x01;
 515                 R828_Freq_Info.XTAL_CAP0P=0x00;
 516                 R828_Freq_Info.IMR_MEM = 0;
 517         }
 518         else if( LO_freq>=60000 && LO_freq<65000)
 519         {
 520                 R828_Freq_Info.OPEN_D=0x08; // low
 521                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 522                 R828_Freq_Info.TF_C=0x7B;     //R27[7:0]  band8,band4
 523                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 524                 R828_Freq_Info.XTAL_CAP10P=0x01;
 525                 R828_Freq_Info.XTAL_CAP0P=0x00;
 526                 R828_Freq_Info.IMR_MEM = 0;
 527         }
 528         else if( LO_freq>=65000 && LO_freq<70000)
 529         {
 530                 R828_Freq_Info.OPEN_D=0x08; // low
 531                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 532                 R828_Freq_Info.TF_C=0x69;     //R27[7:0]  band9,band6
 533                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 534                 R828_Freq_Info.XTAL_CAP10P=0x01;
 535                 R828_Freq_Info.XTAL_CAP0P=0x00;
 536                 R828_Freq_Info.IMR_MEM = 0;
 537         }
 538         else if( LO_freq>=70000 && LO_freq<75000)
 539         {
 540                 R828_Freq_Info.OPEN_D=0x08; // low
 541                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 542                 R828_Freq_Info.TF_C=0x58;     //R27[7:0]  band10,band7
 543                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 544                 R828_Freq_Info.XTAL_CAP10P=0x01;
 545                 R828_Freq_Info.XTAL_CAP0P=0x00;
 546                 R828_Freq_Info.IMR_MEM = 0;
 547         }
 548         else if( LO_freq>=75000 && LO_freq<80000)
 549         {
 550                 R828_Freq_Info.OPEN_D=0x00; // high
 551                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 552                 R828_Freq_Info.TF_C=0x44;     //R27[7:0]  band11,band11
 553                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 554                 R828_Freq_Info.XTAL_CAP10P=0x01;
 555                 R828_Freq_Info.XTAL_CAP0P=0x00;
 556                 R828_Freq_Info.IMR_MEM = 0;
 557         }
 558         else if( LO_freq>=80000 && LO_freq<90000)
 559         {
 560                 R828_Freq_Info.OPEN_D=0x00; // high
 561                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 562                 R828_Freq_Info.TF_C=0x44;     //R27[7:0]  band11,band11
 563                 R828_Freq_Info.XTAL_CAP20P=0x02;  //R16[1:0]  20pF (10)
 564                 R828_Freq_Info.XTAL_CAP10P=0x01;
 565                 R828_Freq_Info.XTAL_CAP0P=0x00;
 566                 R828_Freq_Info.IMR_MEM = 0;
 567         }
 568         else if( LO_freq>=90000 && LO_freq<100000)
 569         {
 570                 R828_Freq_Info.OPEN_D=0x00; // high
 571                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 572                 R828_Freq_Info.TF_C=0x34;     //R27[7:0]  band12,band11
 573                 R828_Freq_Info.XTAL_CAP20P=0x01;  //R16[1:0]  10pF (01)
 574                 R828_Freq_Info.XTAL_CAP10P=0x01;
 575                 R828_Freq_Info.XTAL_CAP0P=0x00;
 576                 R828_Freq_Info.IMR_MEM = 0;
 577         }
 578         else if( LO_freq>=100000 && LO_freq<110000)
 579         {
 580                 R828_Freq_Info.OPEN_D=0x00; // high
 581                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 582                 R828_Freq_Info.TF_C=0x34;     //R27[7:0]  band12,band11
 583                 R828_Freq_Info.XTAL_CAP20P=0x01;  //R16[1:0]  10pF (01)
 584                 R828_Freq_Info.XTAL_CAP10P=0x01;
 585                 R828_Freq_Info.XTAL_CAP0P=0x00;
 586                 R828_Freq_Info.IMR_MEM = 0;
 587         }
 588         else if( LO_freq>=110000 && LO_freq<120000)
 589         {
 590                 R828_Freq_Info.OPEN_D=0x00; // high
 591                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 592                 R828_Freq_Info.TF_C=0x24;     //R27[7:0]  band13,band11
 593                 R828_Freq_Info.XTAL_CAP20P=0x01;  //R16[1:0]  10pF (01)
 594                 R828_Freq_Info.XTAL_CAP10P=0x01;
 595                 R828_Freq_Info.XTAL_CAP0P=0x00;
 596                 R828_Freq_Info.IMR_MEM = 1;
 597         }
 598         else if( LO_freq>=120000 && LO_freq<140000)
 599         {
 600                 R828_Freq_Info.OPEN_D=0x00; // high
 601                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 602                 R828_Freq_Info.TF_C=0x24;     //R27[7:0]  band13,band11
 603                 R828_Freq_Info.XTAL_CAP20P=0x01;  //R16[1:0]  10pF (01)
 604                 R828_Freq_Info.XTAL_CAP10P=0x01;
 605                 R828_Freq_Info.XTAL_CAP0P=0x00;
 606                 R828_Freq_Info.IMR_MEM = 1;
 607         }
 608         else if( LO_freq>=140000 && LO_freq<180000)
 609         {
 610                 R828_Freq_Info.OPEN_D=0x00; // high
 611                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 612                 R828_Freq_Info.TF_C=0x14;     //R27[7:0]  band14,band11
 613                 R828_Freq_Info.XTAL_CAP20P=0x01;  //R16[1:0]  10pF (01)
 614                 R828_Freq_Info.XTAL_CAP10P=0x01;
 615                 R828_Freq_Info.XTAL_CAP0P=0x00;
 616                 R828_Freq_Info.IMR_MEM = 1;
 617         }
 618         else if( LO_freq>=180000 && LO_freq<220000)
 619         {
 620                 R828_Freq_Info.OPEN_D=0x00; // high
 621                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 622                 R828_Freq_Info.TF_C=0x13;     //R27[7:0]  band14,band12
 623                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 624                 R828_Freq_Info.XTAL_CAP10P=0x00;
 625                 R828_Freq_Info.XTAL_CAP0P=0x00;
 626                 R828_Freq_Info.IMR_MEM = 1;
 627         }
 628         else if( LO_freq>=220000 && LO_freq<250000)
 629         {
 630                 R828_Freq_Info.OPEN_D=0x00; // high
 631                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 632                 R828_Freq_Info.TF_C=0x13;     //R27[7:0]  band14,band12
 633                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 634                 R828_Freq_Info.XTAL_CAP10P=0x00;
 635                 R828_Freq_Info.XTAL_CAP0P=0x00;
 636                 R828_Freq_Info.IMR_MEM = 2;
 637         }
 638         else if( LO_freq>=250000 && LO_freq<280000)
 639         {
 640                 R828_Freq_Info.OPEN_D=0x00; // high
 641                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 642                 R828_Freq_Info.TF_C=0x11;     //R27[7:0]  highest,highest
 643                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 644                 R828_Freq_Info.XTAL_CAP10P=0x00;
 645                 R828_Freq_Info.XTAL_CAP0P=0x00;
 646                 R828_Freq_Info.IMR_MEM = 2;
 647         }
 648         else if( LO_freq>=280000 && LO_freq<310000)
 649         {
 650                 R828_Freq_Info.OPEN_D=0x00; // high
 651                 R828_Freq_Info.RF_MUX_PLOY = 0x02;  //R26[7:6]=0 (LPF)  R26[1:0]=2 (low)
 652                 R828_Freq_Info.TF_C=0x00;     //R27[7:0]  highest,highest
 653                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 654                 R828_Freq_Info.XTAL_CAP10P=0x00;
 655                 R828_Freq_Info.XTAL_CAP0P=0x00;
 656                 R828_Freq_Info.IMR_MEM = 2;
 657         }
 658         else if( LO_freq>=310000 && LO_freq<450000)
 659         {
 660                 R828_Freq_Info.OPEN_D=0x00; // high
 661                 R828_Freq_Info.RF_MUX_PLOY = 0x41;  //R26[7:6]=1 (bypass)  R26[1:0]=1 (middle)
 662                 R828_Freq_Info.TF_C=0x00;     //R27[7:0]  highest,highest
 663                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 664                 R828_Freq_Info.XTAL_CAP10P=0x00;
 665                 R828_Freq_Info.XTAL_CAP0P=0x00;
 666                 R828_Freq_Info.IMR_MEM = 2;
 667         }
 668         else if( LO_freq>=450000 && LO_freq<588000)
 669         {
 670                 R828_Freq_Info.OPEN_D=0x00; // high
 671                 R828_Freq_Info.RF_MUX_PLOY = 0x41;  //R26[7:6]=1 (bypass)  R26[1:0]=1 (middle)
 672                 R828_Freq_Info.TF_C=0x00;     //R27[7:0]  highest,highest
 673                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 674                 R828_Freq_Info.XTAL_CAP10P=0x00;
 675                 R828_Freq_Info.XTAL_CAP0P=0x00;
 676                 R828_Freq_Info.IMR_MEM = 3;
 677         }
 678         else if( LO_freq>=588000 && LO_freq<650000)
 679         {
 680                 R828_Freq_Info.OPEN_D=0x00; // high
 681                 R828_Freq_Info.RF_MUX_PLOY = 0x40;  //R26[7:6]=1 (bypass)  R26[1:0]=0 (highest)
 682                 R828_Freq_Info.TF_C=0x00;     //R27[7:0]  highest,highest
 683                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 684                 R828_Freq_Info.XTAL_CAP10P=0x00;
 685                 R828_Freq_Info.XTAL_CAP0P=0x00;
 686                 R828_Freq_Info.IMR_MEM = 3;
 687         }
 688         else
 689         {
 690                 R828_Freq_Info.OPEN_D=0x00; // high
 691                 R828_Freq_Info.RF_MUX_PLOY = 0x40;  //R26[7:6]=1 (bypass)  R26[1:0]=0 (highest)
 692                 R828_Freq_Info.TF_C=0x00;     //R27[7:0]  highest,highest
 693                 R828_Freq_Info.XTAL_CAP20P=0x00;  //R16[1:0]  0pF (00)
 694                 R828_Freq_Info.XTAL_CAP10P=0x00;
 695                 R828_Freq_Info.XTAL_CAP0P=0x00;
 696                 R828_Freq_Info.IMR_MEM = 4;
 697         }
 698
 699         return R828_Freq_Info;
 700 }
 701
 702 SysFreq_Info_Type R828_SysFreq_Sel(R828_Standard_Type R828_Standard,UINT32 RF_freq)
 703 {
 704         SysFreq_Info_Type R828_SysFreq_Info;
 705
 706         switch(R828_Standard)
 707         {
 708
 709         case DVB_T_6M:
 710         case DVB_T_7M:
 711         case DVB_T_7M_2:
 712         case DVB_T_8M:
 713                 if( (RF_freq==506000) || (RF_freq==666000) || (RF_freq==818000) )
 714                 {
 715                         R828_SysFreq_Info.MIXER_TOP=0x14;           // MIXER TOP:14 , TOP-1, low-discharge
 716                         R828_SysFreq_Info.LNA_TOP=0xE5;             // Detect BW 3, LNA TOP:4, PreDet Top:2
 717                         R828_SysFreq_Info.CP_CUR=0x28;            //101, 0.2
 718                         R828_SysFreq_Info.DIV_BUF_CUR=0x20; // 10, 200u
 719                 }
 720                 else
 721                 {
 722                         R828_SysFreq_Info.MIXER_TOP=0x24;           // MIXER TOP:13 , TOP-1, low-discharge
 723                         R828_SysFreq_Info.LNA_TOP=0xE5;         // Detect BW 3, LNA TOP:4, PreDet Top:2
 724                         R828_SysFreq_Info.CP_CUR=0x38;            // 111, auto
 725                         R828_SysFreq_Info.DIV_BUF_CUR=0x30; // 11, 150u
 726                 }
 727                         R828_SysFreq_Info.LNA_VTH_L=0x53;                   // LNA VTH 0.84     ,  VTL 0.64
 728                         R828_SysFreq_Info.MIXER_VTH_L=0x75;     // MIXER VTH 1.04, VTL 0.84
 729                         R828_SysFreq_Info.AIR_CABLE1_IN=0x00;
 730                         R828_SysFreq_Info.CABLE2_IN=0x00;
 731                         R828_SysFreq_Info.PRE_DECT=0x40;
 732                         R828_SysFreq_Info.LNA_DISCHARGE=14;
 733                         R828_SysFreq_Info.FILTER_CUR=0x40;         // 10, low
 734                 break;
 735
 736
 737         case DVB_T2_6M:
 738         case DVB_T2_7M:
 739         case DVB_T2_7M_2:
 740         case DVB_T2_8M:
 741                         R828_SysFreq_Info.MIXER_TOP=0x24;           // MIXER TOP:13 , TOP-1, low-discharge
 742                         R828_SysFreq_Info.LNA_TOP=0xE5;             // Detect BW 3, LNA TOP:4, PreDet Top:2
 743                         R828_SysFreq_Info.LNA_VTH_L=0x53;               // LNA VTH 0.84 ,  VTL 0.64
 744                         R828_SysFreq_Info.MIXER_VTH_L=0x75;     // MIXER VTH 1.04, VTL 0.84
 745                         R828_SysFreq_Info.AIR_CABLE1_IN=0x00;
 746                         R828_SysFreq_Info.CABLE2_IN=0x00;
 747                         R828_SysFreq_Info.PRE_DECT=0x40;
 748                         R828_SysFreq_Info.LNA_DISCHARGE=14;
 749                         R828_SysFreq_Info.CP_CUR=0x38;            // 111, auto
 750                         R828_SysFreq_Info.DIV_BUF_CUR=0x30; // 11, 150u
 751                         R828_SysFreq_Info.FILTER_CUR=0x40;    // 10, low
 752                 break;
 753
 754         case ISDB_T:
 755                         R828_SysFreq_Info.MIXER_TOP=0x24;       // MIXER TOP:13 , TOP-1, low-discharge
 756                         R828_SysFreq_Info.LNA_TOP=0xE5;         // Detect BW 3, LNA TOP:4, PreDet Top:2
 757                         R828_SysFreq_Info.LNA_VTH_L=0x75;               // LNA VTH 1.04 ,  VTL 0.84
 758                         R828_SysFreq_Info.MIXER_VTH_L=0x75;     // MIXER VTH 1.04, VTL 0.84
 759                         R828_SysFreq_Info.AIR_CABLE1_IN=0x00;
 760                         R828_SysFreq_Info.CABLE2_IN=0x00;
 761                         R828_SysFreq_Info.PRE_DECT=0x40;
 762                         R828_SysFreq_Info.LNA_DISCHARGE=14;
 763                         R828_SysFreq_Info.CP_CUR=0x38;            // 111, auto
 764                         R828_SysFreq_Info.DIV_BUF_CUR=0x30; // 11, 150u
 765                         R828_SysFreq_Info.FILTER_CUR=0x40;    // 10, low
 766                 break;
 767
 768         default: //DVB-T 8M
 769                         R828_SysFreq_Info.MIXER_TOP=0x24;           // MIXER TOP:13 , TOP-1, low-discharge
 770                         R828_SysFreq_Info.LNA_TOP=0xE5;         // Detect BW 3, LNA TOP:4, PreDet Top:2
 771                         R828_SysFreq_Info.LNA_VTH_L=0x53;               // LNA VTH 0.84 ,  VTL 0.64
 772                         R828_SysFreq_Info.MIXER_VTH_L=0x75;     // MIXER VTH 1.04, VTL 0.84
 773                         R828_SysFreq_Info.AIR_CABLE1_IN=0x00;
 774                         R828_SysFreq_Info.CABLE2_IN=0x00;
 775                         R828_SysFreq_Info.PRE_DECT=0x40;
 776                         R828_SysFreq_Info.LNA_DISCHARGE=14;
 777                         R828_SysFreq_Info.CP_CUR=0x38;            // 111, auto
 778                         R828_SysFreq_Info.DIV_BUF_CUR=0x30; // 11, 150u
 779                         R828_SysFreq_Info.FILTER_CUR=0x40;    // 10, low
 780                 break;
 781
 782         } //end switch
 783
 784 //DTV use Diplexer
 785 #if(USE_DIPLEXER==TRUE)
 786 if ((Rafael_Chip==R820C) || (Rafael_Chip==R820T) || (Rafael_Chip==R828S))
 787 {
 788         // Air-in (>=DIP_FREQ) & cable-1(<DIP_FREQ)
 789         if(RF_freq >= DIP_FREQ)
 790         {
 791                 R828_SysFreq_Info.AIR_CABLE1_IN = 0x00; //air in, cable-1 off
 792                 R828_SysFreq_Info.CABLE2_IN = 0x00;     //cable-2 off
 793         }
 794         else
 795         {
 796                 R828_SysFreq_Info.AIR_CABLE1_IN = 0x60; //cable-1 in, air off
 797                 R828_SysFreq_Info.CABLE2_IN = 0x00;     //cable-2 off
 798         }
 799 }
 800 #endif
 801         return R828_SysFreq_Info;
 802
 803         }
 804
 805 R828_ErrCode R828_Xtal_Check(void *pTuner)
 806 {
 807         UINT8 ArrayNum;
 808
 809         ArrayNum = 27;
 810         for(ArrayNum=0;ArrayNum<27;ArrayNum++)
 811         {
 812                 R828_Arry[ArrayNum] = R828_iniArry[ArrayNum];
 813         }
 814
 815         //cap 30pF & Drive Low
 816         R828_I2C.RegAddr = 0x10;
 817         R828_Arry[11]    = (R828_Arry[11] & 0xF4) | 0x0B ;
 818         R828_I2C.Data    = R828_Arry[11];
 819         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 820             return RT_Fail;
 821
 822         //set pll autotune = 128kHz
 823         R828_I2C.RegAddr = 0x1A;
 824         R828_Arry[21]    = R828_Arry[21] & 0xF3;
 825         R828_I2C.Data    = R828_Arry[21];
 826         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 827                 return RT_Fail;
 828
 829         //set manual initial reg = 111111;
 830         R828_I2C.RegAddr = 0x13;
 831         R828_Arry[14]    = (R828_Arry[14] & 0x80) | 0x7F;
 832         R828_I2C.Data    = R828_Arry[14];
 833         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 834                 return RT_Fail;
 835
 836         //set auto
 837         R828_I2C.RegAddr = 0x13;
 838         R828_Arry[14]    = (R828_Arry[14] & 0xBF);
 839         R828_I2C.Data    = R828_Arry[14];
 840         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 841                 return RT_Fail;
 842
 843         R828_Delay_MS(pTuner, 5);
 844
 845         R828_I2C_Len.RegAddr = 0x00;
 846         R828_I2C_Len.Len     = 3;
 847         if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
 848                 return RT_Fail;
 849
 850         // if 30pF unlock, set to cap 20pF
 851 #if (USE_16M_XTAL==TRUE)
 852         //VCO=2360MHz for 16M Xtal. VCO band 26
 853     if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) > 29) || ((R828_I2C_Len.Data[2] & 0x3F) < 23))
 854 #else
 855         if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) == 0x3F))
 856 #endif
 857         {
 858                 //cap 20pF
 859             R828_I2C.RegAddr = 0x10;
 860             R828_Arry[11]    = (R828_Arry[11] & 0xFC) | 0x02;
 861             R828_I2C.Data    = R828_Arry[11];
 862             if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 863                     return RT_Fail;
 864
 865                 R828_Delay_MS(pTuner, 5);
 866
 867                 R828_I2C_Len.RegAddr = 0x00;
 868                 R828_I2C_Len.Len     = 3;
 869                 if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
 870                     return RT_Fail;
 871
 872                 // if 20pF unlock, set to cap 10pF
 873 #if (USE_16M_XTAL==TRUE)
 874         if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) > 29) || ((R828_I2C_Len.Data[2] & 0x3F) < 23))
 875 #else
 876             if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) == 0x3F))
 877 #endif
 878            {
 879                    //cap 10pF
 880                R828_I2C.RegAddr = 0x10;
 881                R828_Arry[11]    = (R828_Arry[11] & 0xFC) | 0x01;
 882                R828_I2C.Data    = R828_Arry[11];
 883                if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 884                        return RT_Fail;
 885
 886                    R828_Delay_MS(pTuner, 5);
 887
 888                    R828_I2C_Len.RegAddr = 0x00;
 889                    R828_I2C_Len.Len     = 3;
 890                    if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
 891                        return RT_Fail;
 892
 893                    // if 10pF unlock, set to cap 0pF
 894 #if (USE_16M_XTAL==TRUE)
 895            if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) > 29) || ((R828_I2C_Len.Data[2] & 0x3F) < 23))
 896 #else
 897                if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) == 0x3F))
 898 #endif
 899               {
 900                       //cap 0pF
 901                   R828_I2C.RegAddr = 0x10;
 902                   R828_Arry[11]    = (R828_Arry[11] & 0xFC) | 0x00;
 903                   R828_I2C.Data    = R828_Arry[11];
 904                   if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 905                           return RT_Fail;
 906
 907                       R828_Delay_MS(pTuner, 5);
 908
 909                       R828_I2C_Len.RegAddr = 0x00;
 910                       R828_I2C_Len.Len     = 3;
 911                       if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
 912                            return RT_Fail;
 913
 914                       // if unlock, set to high drive
 915 #if (USE_16M_XTAL==TRUE)
 916                if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) > 29) || ((R828_I2C_Len.Data[2] & 0x3F) < 23))
 917 #else
 918                       if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) == 0x3F))
 919 #endif
 920                           {
 921                                    //X'tal drive high
 922                        R828_I2C.RegAddr = 0x10;
 923                        R828_Arry[11]    = (R828_Arry[11] & 0xF7) ;
 924                        R828_I2C.Data    = R828_Arry[11];
 925                        if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
 926                           return RT_Fail;
 927
 928                                    //R828_Delay_MS(15);
 929                                    R828_Delay_MS(pTuner, 20);
 930
 931                            R828_I2C_Len.RegAddr = 0x00;
 932                            R828_I2C_Len.Len     = 3;
 933                            if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
 934                                   return RT_Fail;
 935
 936 #if (USE_16M_XTAL==TRUE)
 937                    if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) > 29) || ((R828_I2C_Len.Data[2] & 0x3F) < 23))
 938 #else
 939                        if(((R828_I2C_Len.Data[2] & 0x40) == 0x00) || ((R828_I2C_Len.Data[2] & 0x3F) == 0x3F))
 940 #endif
 941                                    {
 942                                      return RT_Fail;
 943                                    }
 944                                    else //0p+high drive lock
 945                                    {
 946                                                 Xtal_cap_sel_tmp = XTAL_HIGH_CAP_0P;
 947                                    }
 948                           }
 949                       else //0p lock
 950                           {
 951                                    Xtal_cap_sel_tmp = XTAL_LOW_CAP_0P;
 952                           }
 953                    }
 954                    else //10p lock
 955                    {
 956                            Xtal_cap_sel_tmp = XTAL_LOW_CAP_10P;
 957                    }
 958                 }
 959                 else //20p lock
 960                 {
 961                    Xtal_cap_sel_tmp = XTAL_LOW_CAP_20P;
 962                 }
 963         }
 964         else // 30p lock
 965         {
 966                 Xtal_cap_sel_tmp = XTAL_LOW_CAP_30P;
 967         }
 968
 969     return RT_Success;
 970 }
 971 R828_ErrCode R828_Init(void *pTuner)
 972 {
 973 //      R820T_EXTRA_MODULE *pExtra;
 974     UINT8 i;
 975
 976         // Get tuner extra module.
 977 //      pExtra = &(pTuner->Extra.R820t);
 978
 979     //write initial reg
 980         //if(R828_InitReg(pTuner) != RT_Success)
 981         //      return RT_Fail;
 982
 983         if(R828_IMR_done_flag==FALSE)
 984         {
 985
 986           //write initial reg
 987 //        if(R828_InitReg(pTuner) != RT_Success)
 988 //                return RT_Fail;
 989
 990           //Do Xtal check
 991           if((Rafael_Chip==R820T) || (Rafael_Chip==R828S) || (Rafael_Chip==R820C))
 992           {
 993                   Xtal_cap_sel = XTAL_HIGH_CAP_0P;
 994           }
 995           else
 996           {
 997           if(R828_Xtal_Check(pTuner) != RT_Success)        //1st
 998                   return RT_Fail;
 999
1000                   Xtal_cap_sel = Xtal_cap_sel_tmp;
1001
1002                   if(R828_Xtal_Check(pTuner) != RT_Success)        //2nd
1003                   return RT_Fail;
1004
1005                   if(Xtal_cap_sel_tmp > Xtal_cap_sel)
1006                   {
1007                           Xtal_cap_sel = Xtal_cap_sel_tmp;
1008                   }
1009
1010                   if(R828_Xtal_Check(pTuner) != RT_Success)        //3rd
1011                   return RT_Fail;
1012
1013                   if(Xtal_cap_sel_tmp > Xtal_cap_sel)
1014                   {
1015                       Xtal_cap_sel = Xtal_cap_sel_tmp;
1016                   }
1017
1018           }
1019
1020           //reset filter cal.
1021       for (i=0; i<STD_SIZE; i++)
1022           {
1023                   R828_Fil_Cal_flag[i] = FALSE;
1024                   R828_Fil_Cal_code[i] = 0;
1025           }
1026
1027 #if 0
1028           //start imr cal.
1029           if(R828_InitReg(pTuner) != RT_Success)        //write initial reg before doing cal
1030               return RT_Fail;
1031
1032           if(R828_IMR_Prepare(pTuner) != RT_Success)
1033                 return RT_Fail;
1034
1035           if(R828_IMR(pTuner, 3, TRUE) != RT_Success)       //Full K node 3
1036                 return RT_Fail;
1037
1038           if(R828_IMR(pTuner, 1, FALSE) != RT_Success)
1039                 return RT_Fail;
1040
1041           if(R828_IMR(pTuner, 0, FALSE) != RT_Success)
1042                 return RT_Fail;
1043
1044           if(R828_IMR(pTuner, 2, FALSE) != RT_Success)
1045                 return RT_Fail;
1046
1047           if(R828_IMR(pTuner, 4, FALSE) != RT_Success)
1048                 return RT_Fail;
1049
1050           R828_IMR_done_flag = TRUE;
1051 #endif
1052         }
1053
1054         //write initial reg
1055         if(R828_InitReg(pTuner) != RT_Success)
1056                 return RT_Fail;
1057
1058         return RT_Success;
1059 }
1060
1061
1062
1063 R828_ErrCode R828_InitReg(void *pTuner)
1064 {
1065         UINT8 InitArryCount;
1066         UINT8 InitArryNum;
1067
1068         InitArryCount = 0;
1069         InitArryNum  = 27;
1070
1071         //UINT32 LO_KHz      = 0;
1072
1073         //Write Full Table
1074         R828_I2C_Len.RegAddr = 0x05;
1075         R828_I2C_Len.Len     = InitArryNum;
1076         for(InitArryCount = 0;InitArryCount < InitArryNum;InitArryCount ++)
1077         {
1078                 R828_I2C_Len.Data[InitArryCount] = R828_iniArry[InitArryCount];
1079         }
1080         if(I2C_Write_Len(pTuner, &R828_I2C_Len) != RT_Success)
1081                 return RT_Fail;
1082
1083         return RT_Success;
1084 }
1085
1086
1087 R828_ErrCode R828_IMR_Prepare(void *pTuner)
1088
1089 {
1090      UINT8 ArrayNum;
1091
1092      ArrayNum=27;
1093
1094      for(ArrayNum=0;ArrayNum<27;ArrayNum++)
1095      {
1096            R828_Arry[ArrayNum] = R828_iniArry[ArrayNum];
1097      }
1098      //IMR Preparation
1099      //lna off (air-in off)
1100      R828_I2C.RegAddr = 0x05;
1101      R828_Arry[0]     = R828_Arry[0]  | 0x20;
1102      R828_I2C.Data    = R828_Arry[0];
1103      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1104            return RT_Fail;
1105      //mixer gain mode = manual
1106      R828_I2C.RegAddr = 0x07;
1107      R828_Arry[2]     = (R828_Arry[2] & 0xEF);
1108      R828_I2C.Data    = R828_Arry[2];
1109      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1110            return RT_Fail;
1111      //filter corner = lowest
1112      R828_I2C.RegAddr = 0x0A;
1113      R828_Arry[5]     = R828_Arry[5] | 0x0F;
1114      R828_I2C.Data    = R828_Arry[5];
1115      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1116            return RT_Fail;
1117      //filter bw=+2cap, hp=5M
1118      R828_I2C.RegAddr = 0x0B;
1119      R828_Arry[6]    = (R828_Arry[6] & 0x90) | 0x60;
1120      R828_I2C.Data    = R828_Arry[6];
1121      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1122            return RT_Fail;
1123      //adc=on, vga code mode, gain = 26.5dB
1124      R828_I2C.RegAddr = 0x0C;
1125      R828_Arry[7]    = (R828_Arry[7] & 0x60) | 0x0B;
1126      R828_I2C.Data    = R828_Arry[7];
1127      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1128            return RT_Fail;
1129      //ring clk = on
1130      R828_I2C.RegAddr = 0x0F;
1131      R828_Arry[10]   &= 0xF7;
1132      R828_I2C.Data    = R828_Arry[10];
1133      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1134            return RT_Fail;
1135      //ring power = on
1136      R828_I2C.RegAddr = 0x18;
1137      R828_Arry[19]    = R828_Arry[19] | 0x10;
1138      R828_I2C.Data    = R828_Arry[19];
1139      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1140            return RT_Fail;
1141      //from ring = ring pll in
1142      R828_I2C.RegAddr = 0x1C;
1143      R828_Arry[23]    = R828_Arry[23] | 0x02;
1144      R828_I2C.Data    = R828_Arry[23];
1145      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1146            return RT_Fail;
1147      //sw_pdect = det3
1148      R828_I2C.RegAddr = 0x1E;
1149      R828_Arry[25]    = R828_Arry[25] | 0x80;
1150      R828_I2C.Data    = R828_Arry[25];
1151      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1152            return RT_Fail;
1153         // Set filt_3dB
1154         R828_Arry[1]  = R828_Arry[1] | 0x20;
1155         R828_I2C.RegAddr  = 0x06;
1156         R828_I2C.Data     = R828_Arry[1];
1157         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1158                 return RT_Fail;
1159
1160       return RT_Success;
1161 }
1162
1163 R828_ErrCode R828_IMR(void *pTuner, UINT8 IMR_MEM, int IM_Flag)
1164 {
1165
1166         UINT32 RingVCO;
1167         UINT32 RingFreq;
1168         UINT32 RingRef;
1169         UINT8 n_ring;
1170         UINT8 n;
1171
1172         R828_SectType IMR_POINT;
1173
1174
1175         RingVCO = 0;
1176         RingFreq = 0;
1177         RingRef = 0;
1178         n_ring = 0;
1179
1180         if (R828_Xtal>24000)
1181                 RingRef = R828_Xtal /2;
1182         else
1183                 RingRef = R828_Xtal;
1184
1185         for(n=0;n<16;n++)
1186         {
1187                 if((16+n)* 8 * RingRef >= 3100000)
1188                 {
1189                 n_ring=n;
1190                 break;
1191                 }
1192
1193                 if(n==15)   //n_ring not found
1194                 {
1195             //return RT_Fail;
1196                         n_ring=n;
1197                 }
1198
1199         }
1200
1201         R828_Arry[19] &= 0xF0;      //set ring[3:0]
1202         R828_Arry[19] |= n_ring;
1203         RingVCO = (16+n_ring)* 8 * RingRef;
1204         R828_Arry[19]&=0xDF;   //clear ring_se23
1205         R828_Arry[20]&=0xFC;   //clear ring_seldiv
1206         R828_Arry[26]&=0xFC;   //clear ring_att
1207
1208         switch(IMR_MEM)
1209         {
1210         case 0:
1211                 RingFreq = RingVCO/48;
1212                 R828_Arry[19]|=0x20;  // ring_se23 = 1
1213                 R828_Arry[20]|=0x03;  // ring_seldiv = 3
1214                 R828_Arry[26]|=0x02;  // ring_att 10
1215                 break;
1216         case 1:
1217                 RingFreq = RingVCO/16;
1218                 R828_Arry[19]|=0x00;  // ring_se23 = 0
1219                 R828_Arry[20]|=0x02;  // ring_seldiv = 2
1220                 R828_Arry[26]|=0x00;  // pw_ring 00
1221                 break;
1222         case 2:
1223                 RingFreq = RingVCO/8;
1224                 R828_Arry[19]|=0x00;  // ring_se23 = 0
1225                 R828_Arry[20]|=0x01;  // ring_seldiv = 1
1226                 R828_Arry[26]|=0x03;  // pw_ring 11
1227                 break;
1228         case 3:
1229                 RingFreq = RingVCO/6;
1230                 R828_Arry[19]|=0x20;  // ring_se23 = 1
1231                 R828_Arry[20]|=0x00;  // ring_seldiv = 0
1232                 R828_Arry[26]|=0x03;  // pw_ring 11
1233                 break;
1234         case 4:
1235                 RingFreq = RingVCO/4;
1236                 R828_Arry[19]|=0x00;  // ring_se23 = 0
1237                 R828_Arry[20]|=0x00;  // ring_seldiv = 0
1238                 R828_Arry[26]|=0x01;  // pw_ring 01
1239                 break;
1240         default:
1241                 RingFreq = RingVCO/4;
1242                 R828_Arry[19]|=0x00;  // ring_se23 = 0
1243                 R828_Arry[20]|=0x00;  // ring_seldiv = 0
1244                 R828_Arry[26]|=0x01;  // pw_ring 01
1245                 break;
1246         }
1247
1248
1249         //write pw_ring,n_ring,ringdiv2 to I2C
1250
1251         //------------n_ring,ring_se23----------//
1252         R828_I2C.RegAddr = 0x18;
1253         R828_I2C.Data    = R828_Arry[19];
1254         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1255                 return RT_Fail;
1256         //------------ring_sediv----------------//
1257         R828_I2C.RegAddr = 0x19;
1258         R828_I2C.Data    = R828_Arry[20];
1259         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1260                 return RT_Fail;
1261         //------------pw_ring-------------------//
1262         R828_I2C.RegAddr = 0x1f;
1263         R828_I2C.Data    = R828_Arry[26];
1264         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1265                 return RT_Fail;
1266
1267         //Must do before PLL()
1268         if(R828_MUX(pTuner, RingFreq - 5300) != RT_Success)                             //MUX input freq ~ RF_in Freq
1269                 return RT_Fail;
1270
1271         if(R828_PLL(pTuner, (RingFreq - 5300) * 1000, STD_SIZE) != RT_Success)                //set pll freq = ring freq - 6M
1272             return RT_Fail;
1273
1274         if(IM_Flag == TRUE)
1275         {
1276         if(R828_IQ(pTuner, &IMR_POINT) != RT_Success)
1277                 return RT_Fail;
1278         }
1279         else
1280         {
1281                 IMR_POINT.Gain_X = IMR_Data[3].Gain_X;
1282                 IMR_POINT.Phase_Y = IMR_Data[3].Phase_Y;
1283                 IMR_POINT.Value = IMR_Data[3].Value;
1284                 if(R828_F_IMR(pTuner, &IMR_POINT) != RT_Success)
1285                         return RT_Fail;
1286         }
1287
1288         //Save IMR Value
1289         switch(IMR_MEM)
1290         {
1291         case 0:
1292                 IMR_Data[0].Gain_X  = IMR_POINT.Gain_X;
1293                 IMR_Data[0].Phase_Y = IMR_POINT.Phase_Y;
1294                 IMR_Data[0].Value   = IMR_POINT.Value;
1295                 break;
1296         case 1:
1297                 IMR_Data[1].Gain_X  = IMR_POINT.Gain_X;
1298                 IMR_Data[1].Phase_Y = IMR_POINT.Phase_Y;
1299                 IMR_Data[1].Value   = IMR_POINT.Value;
1300                 break;
1301         case 2:
1302                 IMR_Data[2].Gain_X  = IMR_POINT.Gain_X;
1303                 IMR_Data[2].Phase_Y = IMR_POINT.Phase_Y;
1304                 IMR_Data[2].Value   = IMR_POINT.Value;
1305                 break;
1306         case 3:
1307                 IMR_Data[3].Gain_X  = IMR_POINT.Gain_X;
1308                 IMR_Data[3].Phase_Y = IMR_POINT.Phase_Y;
1309                 IMR_Data[3].Value   = IMR_POINT.Value;
1310                 break;
1311         case 4:
1312                 IMR_Data[4].Gain_X  = IMR_POINT.Gain_X;
1313                 IMR_Data[4].Phase_Y = IMR_POINT.Phase_Y;
1314                 IMR_Data[4].Value   = IMR_POINT.Value;
1315                 break;
1316     default:
1317                 IMR_Data[4].Gain_X  = IMR_POINT.Gain_X;
1318                 IMR_Data[4].Phase_Y = IMR_POINT.Phase_Y;
1319                 IMR_Data[4].Value   = IMR_POINT.Value;
1320                 break;
1321         }
1322         return RT_Success;
1323 }
1324
1325 R828_ErrCode R828_PLL(void *pTuner, UINT32 LO_Freq, R828_Standard_Type R828_Standard)
1326 {
1327
1328 //      R820T_EXTRA_MODULE *pExtra;
1329
1330         UINT8  MixDiv;
1331         UINT8  DivBuf;
1332         UINT8  Ni;
1333         UINT8  Si;
1334         UINT8  DivNum;
1335         UINT8  Nint;
1336         UINT32 VCO_Min_kHz;
1337         UINT32 VCO_Max_kHz;
1338         uint64_t VCO_Freq;
1339         UINT32 PLL_Ref;         //Max 24000 (kHz)
1340         UINT32 VCO_Fra;         //VCO contribution by SDM (kHz)
1341         UINT16 Nsdm;
1342         UINT16 SDM;
1343         UINT16 SDM16to9;
1344         UINT16 SDM8to1;
1345         //UINT8  Judge    = 0;
1346         UINT8  VCO_fine_tune;
1347
1348         MixDiv   = 2;
1349         DivBuf   = 0;
1350         Ni       = 0;
1351         Si       = 0;
1352         DivNum   = 0;
1353         Nint     = 0;
1354         VCO_Min_kHz  = 1770000;
1355         VCO_Max_kHz  = VCO_Min_kHz*2;
1356         VCO_Freq = 0;
1357         PLL_Ref = 0;            //Max 24000 (kHz)
1358         VCO_Fra = 0;            //VCO contribution by SDM (kHz)
1359         Nsdm            = 2;
1360         SDM             = 0;
1361         SDM16to9        = 0;
1362         SDM8to1  = 0;
1363         //UINT8  Judge    = 0;
1364         VCO_fine_tune = 0;
1365
1366 #if 0
1367         if ((Rafael_Chip==R620D) || (Rafael_Chip==R828D) || (Rafael_Chip==R828))  //X'tal can't not exceed 20MHz for ATV
1368         {
1369                 if(R828_Standard <= SECAM_L1)     //ref set refdiv2, reffreq = Xtal/2 on ATV application
1370                 {
1371                         R828_Arry[11] |= 0x10; //b4=1
1372                         PLL_Ref = R828_Xtal /2;
1373                 }
1374                 else //DTV, FilCal, IMR
1375                 {
1376                         R828_Arry[11] &= 0xEF;
1377                         PLL_Ref = R828_Xtal;
1378                 }
1379         }
1380         else
1381         {
1382                 if(R828_Xtal > 24000)
1383                 {
1384                         R828_Arry[11] |= 0x10; //b4=1
1385                         PLL_Ref = R828_Xtal /2;
1386                 }
1387                 else
1388                 {
1389                         R828_Arry[11] &= 0xEF;
1390                         PLL_Ref = R828_Xtal;
1391                 }
1392         }
1393 #endif
1394         //FIXME hack
1395         R828_Arry[11] &= 0xEF;
1396         PLL_Ref = rtlsdr_get_tuner_clock(pTuner);
1397
1398         R828_I2C.RegAddr = 0x10;
1399         R828_I2C.Data = R828_Arry[11];
1400         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1401                 return RT_Fail;
1402
1403         //set pll autotune = 128kHz
1404         R828_I2C.RegAddr = 0x1A;
1405         R828_Arry[21]    = R828_Arry[21] & 0xF3;
1406         R828_I2C.Data    = R828_Arry[21];
1407         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1408                 return RT_Fail;
1409
1410         //Set VCO current = 100
1411         R828_I2C.RegAddr = 0x12;
1412         R828_Arry[13]    = (R828_Arry[13] & 0x1F) | 0x80;
1413         R828_I2C.Data    = R828_Arry[13];
1414         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1415                 return RT_Fail;
1416
1417         //Divider
1418         while(MixDiv <= 64)
1419         {
1420                 if((((LO_Freq/1000) * MixDiv) >= VCO_Min_kHz) && (((LO_Freq/1000) * MixDiv) < VCO_Max_kHz))
1421                 {
1422                         DivBuf = MixDiv;
1423                         while(DivBuf > 2)
1424                         {
1425                                 DivBuf = DivBuf >> 1;
1426                                 DivNum ++;
1427                         }
1428                         break;
1429                 }
1430                 MixDiv = MixDiv << 1;
1431         }
1432
1433         R828_I2C_Len.RegAddr = 0x00;
1434         R828_I2C_Len.Len     = 5;
1435         if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
1436                 return RT_Fail;
1437
1438         VCO_fine_tune = (R828_I2C_Len.Data[4] & 0x30)>>4;
1439
1440         if(VCO_fine_tune > VCO_pwr_ref)
1441                 DivNum = DivNum - 1;
1442         else if(VCO_fine_tune < VCO_pwr_ref)
1443             DivNum = DivNum + 1;
1444
1445         R828_I2C.RegAddr = 0x10;
1446         R828_Arry[11] &= 0x1F;
1447         R828_Arry[11] |= (DivNum << 5);
1448         R828_I2C.Data = R828_Arry[11];
1449         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1450                 return RT_Fail;
1451
1452         VCO_Freq = (uint64_t)(LO_Freq * (uint64_t)MixDiv);
1453         Nint     = (UINT8) (VCO_Freq / 2 / PLL_Ref);
1454         VCO_Fra  = (UINT16) ((VCO_Freq - 2 * PLL_Ref * Nint) / 1000);
1455
1456         //FIXME hack
1457         PLL_Ref /= 1000;
1458
1459 //      printf("VCO_Freq = %lu, Nint= %u, VCO_Fra= %lu, LO_Freq= %u, MixDiv= %u\n", VCO_Freq, Nint, VCO_Fra, LO_Freq, MixDiv);
1460
1461         //boundary spur prevention
1462         if (VCO_Fra < PLL_Ref/64)           //2*PLL_Ref/128
1463                 VCO_Fra = 0;
1464         else if (VCO_Fra > PLL_Ref*127/64)  //2*PLL_Ref*127/128
1465         {
1466                 VCO_Fra = 0;
1467                 Nint ++;
1468         }
1469         else if((VCO_Fra > PLL_Ref*127/128) && (VCO_Fra < PLL_Ref)) //> 2*PLL_Ref*127/256,  < 2*PLL_Ref*128/256
1470                 VCO_Fra = PLL_Ref*127/128;      // VCO_Fra = 2*PLL_Ref*127/256
1471         else if((VCO_Fra > PLL_Ref) && (VCO_Fra < PLL_Ref*129/128)) //> 2*PLL_Ref*128/256,  < 2*PLL_Ref*129/256
1472                 VCO_Fra = PLL_Ref*129/128;      // VCO_Fra = 2*PLL_Ref*129/256
1473         else
1474                 VCO_Fra = VCO_Fra;
1475
1476         if (Nint > 63) {
1477                 fprintf(stderr, "[R820T] No valid PLL values for %u Hz!\n", LO_Freq);
1478                 return RT_Fail;
1479         }
1480
1481         //N & S
1482         Ni       = (Nint - 13) / 4;
1483         Si       = Nint - 4 *Ni - 13;
1484         R828_I2C.RegAddr = 0x14;
1485         R828_Arry[15]  = 0x00;
1486         R828_Arry[15] |= (Ni + (Si << 6));
1487         R828_I2C.Data = R828_Arry[15];
1488
1489         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1490           return RT_Fail;
1491
1492         //pw_sdm
1493         R828_I2C.RegAddr = 0x12;
1494         R828_Arry[13] &= 0xF7;
1495         if(VCO_Fra == 0)
1496                 R828_Arry[13] |= 0x08;
1497         R828_I2C.Data = R828_Arry[13];
1498         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1499                 return RT_Fail;
1500
1501         //SDM calculator
1502         while(VCO_Fra > 1)
1503         {
1504                 if (VCO_Fra > (2*PLL_Ref / Nsdm))
1505                 {
1506                         SDM = SDM + 32768 / (Nsdm/2);
1507                         VCO_Fra = VCO_Fra - 2*PLL_Ref / Nsdm;
1508                         if (Nsdm >= 0x8000)
1509                                 break;
1510                 }
1511                 Nsdm = Nsdm << 1;
1512         }
1513
1514         SDM16to9 = SDM >> 8;
1515         SDM8to1 =  SDM - (SDM16to9 << 8);
1516
1517         R828_I2C.RegAddr = 0x16;
1518         R828_Arry[17]    = (UINT8) SDM16to9;
1519         R828_I2C.Data    = R828_Arry[17];
1520         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1521                 return RT_Fail;
1522         R828_I2C.RegAddr = 0x15;
1523         R828_Arry[16]    = (UINT8) SDM8to1;
1524         R828_I2C.Data    = R828_Arry[16];
1525         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1526                 return RT_Fail;
1527
1528 //      R828_Delay_MS(10);
1529
1530         if ((Rafael_Chip==R620D) || (Rafael_Chip==R828D) || (Rafael_Chip==R828))
1531         {
1532                 if(R828_Standard <= SECAM_L1)
1533                         R828_Delay_MS(pTuner, 20);
1534                 else
1535                         R828_Delay_MS(pTuner, 10);
1536         }
1537         else
1538         {
1539                 R828_Delay_MS(pTuner, 10);
1540         }
1541
1542         //check PLL lock status
1543         R828_I2C_Len.RegAddr = 0x00;
1544         R828_I2C_Len.Len     = 3;
1545         if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
1546                 return RT_Fail;
1547
1548         if( (R828_I2C_Len.Data[2] & 0x40) == 0x00 )
1549         {
1550                 fprintf(stderr, "[R820T] PLL not locked for %u Hz!\n", LO_Freq);
1551                 R828_I2C.RegAddr = 0x12;
1552                 R828_Arry[13]    = (R828_Arry[13] & 0x1F) | 0x60;  //increase VCO current
1553                 R828_I2C.Data    = R828_Arry[13];
1554                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1555                         return RT_Fail;
1556
1557                 return RT_Fail;
1558         }
1559
1560         //set pll autotune = 8kHz
1561         R828_I2C.RegAddr = 0x1A;
1562         R828_Arry[21]    = R828_Arry[21] | 0x08;
1563         R828_I2C.Data    = R828_Arry[21];
1564         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1565                 return RT_Fail;
1566
1567         return RT_Success;
1568 }
1569
1570 R828_ErrCode R828_MUX(void *pTuner, UINT32 RF_KHz)
1571 {
1572         UINT8 RT_Reg08;
1573         UINT8 RT_Reg09;
1574
1575         RT_Reg08   = 0;
1576         RT_Reg09   = 0;
1577
1578         //Freq_Info_Type Freq_Info1;
1579         Freq_Info1 = R828_Freq_Sel(RF_KHz);
1580
1581         // Open Drain
1582         R828_I2C.RegAddr = 0x17;
1583         R828_Arry[18] = (R828_Arry[18] & 0xF7) | Freq_Info1.OPEN_D;
1584         R828_I2C.Data = R828_Arry[18];
1585         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1586                 return RT_Fail;
1587
1588         // RF_MUX,Polymux
1589         R828_I2C.RegAddr = 0x1A;
1590         R828_Arry[21] = (R828_Arry[21] & 0x3C) | Freq_Info1.RF_MUX_PLOY;
1591         R828_I2C.Data = R828_Arry[21];
1592         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1593                 return RT_Fail;
1594
1595         // TF BAND
1596         R828_I2C.RegAddr = 0x1B;
1597         R828_Arry[22] &= 0x00;
1598         R828_Arry[22] |= Freq_Info1.TF_C;
1599         R828_I2C.Data = R828_Arry[22];
1600         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1601                 return RT_Fail;
1602
1603         // XTAL CAP & Drive
1604         R828_I2C.RegAddr = 0x10;
1605         R828_Arry[11] &= 0xF4;
1606         switch(Xtal_cap_sel)
1607         {
1608            case XTAL_LOW_CAP_30P:
1609            case XTAL_LOW_CAP_20P:
1610                    R828_Arry[11] = R828_Arry[11] | Freq_Info1.XTAL_CAP20P | 0x08;
1611                    break;
1612
1613            case XTAL_LOW_CAP_10P:
1614            R828_Arry[11] = R828_Arry[11] | Freq_Info1.XTAL_CAP10P | 0x08;
1615                    break;
1616
1617            case XTAL_LOW_CAP_0P:
1618                    R828_Arry[11] = R828_Arry[11] | Freq_Info1.XTAL_CAP0P | 0x08;
1619                    break;
1620
1621            case XTAL_HIGH_CAP_0P:
1622                    R828_Arry[11] = R828_Arry[11] | Freq_Info1.XTAL_CAP0P | 0x00;
1623                    break;
1624
1625            default:
1626                R828_Arry[11] = R828_Arry[11] | Freq_Info1.XTAL_CAP0P | 0x08;
1627                    break;
1628         }
1629         R828_I2C.Data    = R828_Arry[11];
1630         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1631                 return RT_Fail;
1632
1633         //Set_IMR
1634         if(R828_IMR_done_flag == TRUE)
1635         {
1636                 RT_Reg08 = IMR_Data[Freq_Info1.IMR_MEM].Gain_X & 0x3F;
1637                 RT_Reg09 = IMR_Data[Freq_Info1.IMR_MEM].Phase_Y & 0x3F;
1638         }
1639         else
1640         {
1641                 RT_Reg08 = 0;
1642             RT_Reg09 = 0;
1643         }
1644
1645         R828_I2C.RegAddr = 0x08;
1646         R828_Arry[3] = R828_iniArry[3] & 0xC0;
1647         R828_Arry[3] = R828_Arry[3] | RT_Reg08;
1648         R828_I2C.Data = R828_Arry[3];
1649         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1650                 return RT_Fail;
1651
1652         R828_I2C.RegAddr = 0x09;
1653         R828_Arry[4] = R828_iniArry[4] & 0xC0;
1654         R828_Arry[4] = R828_Arry[4] | RT_Reg09;
1655         R828_I2C.Data =R828_Arry[4]  ;
1656         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1657                 return RT_Fail;
1658
1659         return RT_Success;
1660 }
1661
1662 R828_ErrCode R828_IQ(void *pTuner, R828_SectType* IQ_Pont)
1663 {
1664         R828_SectType Compare_IQ[3];
1665 //      R828_SectType CompareTemp;
1666 //      UINT8 IQ_Count  = 0;
1667         UINT8 VGA_Count;
1668         UINT16 VGA_Read;
1669         UINT8  X_Direction;  // 1:X, 0:Y
1670
1671         VGA_Count = 0;
1672         VGA_Read = 0;
1673
1674         // increase VGA power to let image significant
1675         for(VGA_Count = 12;VGA_Count < 16;VGA_Count ++)
1676         {
1677                 R828_I2C.RegAddr = 0x0C;
1678                 R828_I2C.Data    = (R828_Arry[7] & 0xF0) + VGA_Count;
1679                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1680                         return RT_Fail;
1681
1682                 R828_Delay_MS(pTuner, 10); //
1683
1684                 if(R828_Muti_Read(pTuner, 0x01, &VGA_Read) != RT_Success)
1685                         return RT_Fail;
1686
1687                 if(VGA_Read > 40*4)
1688                         break;
1689         }
1690
1691         //initial 0x08, 0x09
1692         //Compare_IQ[0].Gain_X  = 0x40; //should be 0xC0 in R828, Jason
1693         //Compare_IQ[0].Phase_Y = 0x40; //should be 0x40 in R828
1694         Compare_IQ[0].Gain_X  = R828_iniArry[3] & 0xC0; // Jason modified, clear b[5], b[4:0]
1695         Compare_IQ[0].Phase_Y = R828_iniArry[4] & 0xC0; //
1696
1697         //while(IQ_Count < 3)
1698         //{
1699             // Determine X or Y
1700             if(R828_IMR_Cross(pTuner, &Compare_IQ[0], &X_Direction) != RT_Success)
1701                         return RT_Fail;
1702
1703                 //if(X_Direction==1)
1704                 //{
1705                 //    if(R828_IQ_Tree(Compare_IQ[0].Phase_Y, Compare_IQ[0].Gain_X, 0x09, &Compare_IQ[0]) != RT_Success) //X
1706                 //        return RT_Fail;
1707                 //}
1708                 //else
1709                 //{
1710                 //   if(R828_IQ_Tree(Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success) //Y
1711                 //      return RT_Fail;
1712                 //}
1713
1714                 /*
1715                 //--- X direction ---//
1716             //X: 3 points
1717                 if(R828_IQ_Tree(Compare_IQ[0].Phase_Y, Compare_IQ[0].Gain_X, 0x09, &Compare_IQ[0]) != RT_Success) //
1718                         return RT_Fail;
1719
1720                 //compare and find min of 3 points. determine I/Q direction
1721                 if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1722                         return RT_Fail;
1723
1724                 //increase step to find min value of this direction
1725                 if(R828_CompreStep(&Compare_IQ[0], 0x08) != RT_Success)
1726                         return RT_Fail;
1727                 */
1728
1729                 if(X_Direction==1)
1730                 {
1731                         //compare and find min of 3 points. determine I/Q direction
1732                     if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1733                           return RT_Fail;
1734
1735                     //increase step to find min value of this direction
1736                     if(R828_CompreStep(pTuner, &Compare_IQ[0], 0x08) != RT_Success)  //X
1737                           return RT_Fail;
1738                 }
1739                 else
1740                 {
1741                    //compare and find min of 3 points. determine I/Q direction
1742                    if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1743                          return RT_Fail;
1744
1745                    //increase step to find min value of this direction
1746                    if(R828_CompreStep(pTuner, &Compare_IQ[0], 0x09) != RT_Success)  //Y
1747                          return RT_Fail;
1748                 }
1749                 /*
1750                 //--- Y direction ---//
1751                 //Y: 3 points
1752                 if(R828_IQ_Tree(Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success) //
1753                         return RT_Fail;
1754
1755                 //compare and find min of 3 points. determine I/Q direction
1756                 if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1757                         return RT_Fail;
1758
1759                 //increase step to find min value of this direction
1760                 if(R828_CompreStep(&Compare_IQ[0], 0x09) != RT_Success)
1761                         return RT_Fail;
1762         */
1763
1764                 //Another direction
1765                 if(X_Direction==1)
1766                 {
1767            if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success) //Y
1768                      return RT_Fail;
1769
1770                    //compare and find min of 3 points. determine I/Q direction
1771                    if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1772                          return RT_Fail;
1773
1774                    //increase step to find min value of this direction
1775                    if(R828_CompreStep(pTuner, &Compare_IQ[0], 0x09) != RT_Success)  //Y
1776                          return RT_Fail;
1777                 }
1778                 else
1779                 {
1780                    if(R828_IQ_Tree(pTuner, Compare_IQ[0].Phase_Y, Compare_IQ[0].Gain_X, 0x09, &Compare_IQ[0]) != RT_Success) //X
1781                      return RT_Fail;
1782
1783                    //compare and find min of 3 points. determine I/Q direction
1784                    if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1785                      return RT_Fail;
1786
1787                //increase step to find min value of this direction
1788                    if(R828_CompreStep(pTuner, &Compare_IQ[0], 0x08) != RT_Success) //X
1789                      return RT_Fail;
1790                 }
1791                 //CompareTemp = Compare_IQ[0];
1792
1793                 //--- Check 3 points again---//
1794                 if(X_Direction==1)
1795                 {
1796                     if(R828_IQ_Tree(pTuner, Compare_IQ[0].Phase_Y, Compare_IQ[0].Gain_X, 0x09, &Compare_IQ[0]) != RT_Success) //X
1797                           return RT_Fail;
1798                 }
1799                 else
1800                 {
1801                    if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success) //Y
1802                         return RT_Fail;
1803                 }
1804
1805                 //if(R828_IQ_Tree(Compare_IQ[0].Phase_Y, Compare_IQ[0].Gain_X, 0x09, &Compare_IQ[0]) != RT_Success) //
1806                 //      return RT_Fail;
1807
1808                 if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
1809                         return RT_Fail;
1810
1811                 //if((CompareTemp.Gain_X == Compare_IQ[0].Gain_X) && (CompareTemp.Phase_Y == Compare_IQ[0].Phase_Y))//Ben Check
1812                 //      break;
1813
1814                 //IQ_Count ++;
1815         //}
1816         //if(IQ_Count ==  3)
1817         //      return RT_Fail;
1818
1819         //Section-4 Check
1820     /*
1821         CompareTemp = Compare_IQ[0];
1822         for(IQ_Count = 0;IQ_Count < 5;IQ_Count ++)
1823         {
1824                 if(R828_Section(&Compare_IQ[0]) != RT_Success)
1825                         return RT_Fail;
1826
1827                 if((CompareTemp.Gain_X == Compare_IQ[0].Gain_X) && (CompareTemp.Phase_Y == Compare_IQ[0].Phase_Y))
1828                         break;
1829         }
1830         */
1831
1832     //Section-9 check
1833     //if(R828_F_IMR(&Compare_IQ[0]) != RT_Success)
1834         if(R828_Section(pTuner, &Compare_IQ[0]) != RT_Success)
1835                         return RT_Fail;
1836
1837         *IQ_Pont = Compare_IQ[0];
1838
1839         //reset gain/phase control setting
1840         R828_I2C.RegAddr = 0x08;
1841         R828_I2C.Data    = R828_iniArry[3] & 0xC0; //Jason
1842         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1843                 return RT_Fail;
1844
1845         R828_I2C.RegAddr = 0x09;
1846         R828_I2C.Data    = R828_iniArry[4] & 0xC0;
1847         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1848                 return RT_Fail;
1849
1850         return RT_Success;
1851 }
1852
1853 //--------------------------------------------------------------------------------------------
1854 // Purpose: record IMC results by input gain/phase location
1855 //          then adjust gain or phase positive 1 step and negtive 1 step, both record results
1856 // input: FixPot: phase or gain
1857 //        FlucPot phase or gain
1858 //        PotReg: 0x08 or 0x09
1859 //        CompareTree: 3 IMR trace and results
1860 // output: TREU or FALSE
1861 //--------------------------------------------------------------------------------------------
1862 R828_ErrCode R828_IQ_Tree(void *pTuner, UINT8 FixPot, UINT8 FlucPot, UINT8 PotReg, R828_SectType* CompareTree)
1863 {
1864         UINT8 TreeCount;
1865         UINT8 TreeTimes;
1866         UINT8 TempPot;
1867         UINT8 PntReg;
1868
1869         TreeCount  = 0;
1870         TreeTimes = 3;
1871         TempPot   = 0;
1872         PntReg    = 0;
1873
1874         if(PotReg == 0x08)
1875                 PntReg = 0x09; //phase control
1876         else
1877                 PntReg = 0x08; //gain control
1878
1879         for(TreeCount = 0;TreeCount < TreeTimes;TreeCount ++)
1880         {
1881                 R828_I2C.RegAddr = PotReg;
1882                 R828_I2C.Data    = FixPot;
1883                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1884                         return RT_Fail;
1885
1886                 R828_I2C.RegAddr = PntReg;
1887                 R828_I2C.Data    = FlucPot;
1888                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1889                         return RT_Fail;
1890
1891                 if(R828_Muti_Read(pTuner, 0x01, &CompareTree[TreeCount].Value) != RT_Success)
1892                         return RT_Fail;
1893
1894                 if(PotReg == 0x08)
1895                 {
1896                         CompareTree[TreeCount].Gain_X  = FixPot;
1897                         CompareTree[TreeCount].Phase_Y = FlucPot;
1898                 }
1899                 else
1900                 {
1901                         CompareTree[TreeCount].Phase_Y  = FixPot;
1902                         CompareTree[TreeCount].Gain_X = FlucPot;
1903                 }
1904
1905                 if(TreeCount == 0)   //try right-side point
1906                         FlucPot ++;
1907                 else if(TreeCount == 1) //try left-side point
1908                 {
1909                         if((FlucPot & 0x1F) < 0x02) //if absolute location is 1, change I/Q direction
1910                         {
1911                                 TempPot = 2 - (FlucPot & 0x1F);
1912                                 if(FlucPot & 0x20) //b[5]:I/Q selection. 0:Q-path, 1:I-path
1913                                 {
1914                                         FlucPot &= 0xC0;
1915                                         FlucPot |= TempPot;
1916                                 }
1917                                 else
1918                                 {
1919                                         FlucPot |= (0x20 | TempPot);
1920                                 }
1921                         }
1922                         else
1923                                 FlucPot -= 2;
1924                 }
1925         }
1926
1927         return RT_Success;
1928 }
1929
1930 //-----------------------------------------------------------------------------------/
1931 // Purpose: compare IMC result aray [0][1][2], find min value and store to CorArry[0]
1932 // input: CorArry: three IMR data array
1933 // output: TRUE or FALSE
1934 //-----------------------------------------------------------------------------------/
1935 R828_ErrCode R828_CompreCor(R828_SectType* CorArry)
1936 {
1937         UINT8 CompCount;
1938         R828_SectType CorTemp;
1939
1940         CompCount = 0;
1941
1942         for(CompCount = 3;CompCount > 0;CompCount --)
1943         {
1944                 if(CorArry[0].Value > CorArry[CompCount - 1].Value) //compare IMC result [0][1][2], find min value
1945                 {
1946                         CorTemp = CorArry[0];
1947                         CorArry[0] = CorArry[CompCount - 1];
1948                         CorArry[CompCount - 1] = CorTemp;
1949                 }
1950         }
1951
1952         return RT_Success;
1953 }
1954
1955 //-------------------------------------------------------------------------------------//
1956 // Purpose: if (Gain<9 or Phase<9), Gain+1 or Phase+1 and compare with min value
1957 //          new < min => update to min and continue
1958 //          new > min => Exit
1959 // input: StepArry: three IMR data array
1960 //        Pace: gain or phase register
1961 // output: TRUE or FALSE
1962 //-------------------------------------------------------------------------------------//
1963 R828_ErrCode R828_CompreStep(void *pTuner, R828_SectType* StepArry, UINT8 Pace)
1964 {
1965         //UINT8 StepCount = 0;
1966         R828_SectType StepTemp;
1967
1968         //min value already saved in StepArry[0]
1969         StepTemp.Phase_Y = StepArry[0].Phase_Y;
1970         StepTemp.Gain_X  = StepArry[0].Gain_X;
1971
1972         while(((StepTemp.Gain_X & 0x1F) < IMR_TRIAL) && ((StepTemp.Phase_Y & 0x1F) < IMR_TRIAL))  //5->10
1973         {
1974                 if(Pace == 0x08)
1975                         StepTemp.Gain_X ++;
1976                 else
1977                         StepTemp.Phase_Y ++;
1978
1979                 R828_I2C.RegAddr = 0x08;
1980                 R828_I2C.Data    = StepTemp.Gain_X ;
1981                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1982                         return RT_Fail;
1983
1984                 R828_I2C.RegAddr = 0x09;
1985                 R828_I2C.Data    = StepTemp.Phase_Y;
1986                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
1987                         return RT_Fail;
1988
1989                 if(R828_Muti_Read(pTuner, 0x01, &StepTemp.Value) != RT_Success)
1990                         return RT_Fail;
1991
1992                 if(StepTemp.Value <= StepArry[0].Value)
1993                 {
1994                         StepArry[0].Gain_X  = StepTemp.Gain_X;
1995                         StepArry[0].Phase_Y = StepTemp.Phase_Y;
1996                         StepArry[0].Value   = StepTemp.Value;
1997                 }
1998                 else
1999                 {
2000                         break;
2001                 }
2002
2003         } //end of while()
2004
2005         return RT_Success;
2006 }
2007
2008 //-----------------------------------------------------------------------------------/
2009 // Purpose: read multiple IMC results for stability
2010 // input: IMR_Reg: IMC result address
2011 //        IMR_Result_Data: result
2012 // output: TRUE or FALSE
2013 //-----------------------------------------------------------------------------------/
2014 R828_ErrCode R828_Muti_Read(void *pTuner, UINT8 IMR_Reg, UINT16* IMR_Result_Data)  //jason modified
2015 {
2016         UINT8 ReadCount;
2017         UINT16 ReadAmount;
2018         UINT8 ReadMax;
2019         UINT8 ReadMin;
2020         UINT8 ReadData;
2021
2022         ReadCount     = 0;
2023         ReadAmount  = 0;
2024         ReadMax = 0;
2025         ReadMin = 255;
2026         ReadData = 0;
2027
2028     R828_Delay_MS(pTuner, 5);
2029
2030         for(ReadCount = 0;ReadCount < 6;ReadCount ++)
2031         {
2032                 R828_I2C_Len.RegAddr = 0x00;
2033                 R828_I2C_Len.Len     = IMR_Reg + 1;  //IMR_Reg = 0x01
2034                 if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
2035                         return RT_Fail;
2036
2037                 ReadData = R828_I2C_Len.Data[1];
2038
2039                 ReadAmount = ReadAmount + (UINT16)ReadData;
2040
2041                 if(ReadData < ReadMin)
2042                         ReadMin = ReadData;
2043
2044         if(ReadData > ReadMax)
2045                         ReadMax = ReadData;
2046         }
2047         *IMR_Result_Data = ReadAmount - (UINT16)ReadMax - (UINT16)ReadMin;
2048
2049         return RT_Success;
2050 }
2051
2052 R828_ErrCode R828_Section(void *pTuner, R828_SectType* IQ_Pont)
2053 {
2054         R828_SectType Compare_IQ[3];
2055         R828_SectType Compare_Bet[3];
2056
2057         //Try X-1 column and save min result to Compare_Bet[0]
2058         if((IQ_Pont->Gain_X & 0x1F) == 0x00)
2059         {
2060                 /*
2061                 if((IQ_Pont->Gain_X & 0xE0) == 0x40) //bug => only compare b[5],
2062                         Compare_IQ[0].Gain_X = 0x61; // Gain=1, I-path //Jason
2063                 else
2064                         Compare_IQ[0].Gain_X = 0x41; // Gain=1, Q-path
2065         */
2066                 Compare_IQ[0].Gain_X = ((IQ_Pont->Gain_X) & 0xDF) + 1;  //Q-path, Gain=1
2067         }
2068         else
2069                 Compare_IQ[0].Gain_X  = IQ_Pont->Gain_X - 1;  //left point
2070         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2071
2072         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)  // y-direction
2073                 return RT_Fail;
2074
2075         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2076                 return RT_Fail;
2077
2078         Compare_Bet[0].Gain_X = Compare_IQ[0].Gain_X;
2079         Compare_Bet[0].Phase_Y = Compare_IQ[0].Phase_Y;
2080         Compare_Bet[0].Value = Compare_IQ[0].Value;
2081
2082         //Try X column and save min result to Compare_Bet[1]
2083         Compare_IQ[0].Gain_X = IQ_Pont->Gain_X;
2084         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2085
2086         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)
2087                 return RT_Fail;
2088
2089         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2090                 return RT_Fail;
2091
2092         Compare_Bet[1].Gain_X = Compare_IQ[0].Gain_X;
2093         Compare_Bet[1].Phase_Y = Compare_IQ[0].Phase_Y;
2094         Compare_Bet[1].Value = Compare_IQ[0].Value;
2095
2096         //Try X+1 column and save min result to Compare_Bet[2]
2097         if((IQ_Pont->Gain_X & 0x1F) == 0x00)
2098                 Compare_IQ[0].Gain_X = ((IQ_Pont->Gain_X) | 0x20) + 1;  //I-path, Gain=1
2099         else
2100             Compare_IQ[0].Gain_X = IQ_Pont->Gain_X + 1;
2101         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2102
2103         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)
2104                 return RT_Fail;
2105
2106         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2107                 return RT_Fail;
2108
2109         Compare_Bet[2].Gain_X = Compare_IQ[0].Gain_X;
2110         Compare_Bet[2].Phase_Y = Compare_IQ[0].Phase_Y;
2111         Compare_Bet[2].Value = Compare_IQ[0].Value;
2112
2113         if(R828_CompreCor(&Compare_Bet[0]) != RT_Success)
2114                 return RT_Fail;
2115
2116         *IQ_Pont = Compare_Bet[0];
2117
2118         return RT_Success;
2119 }
2120
2121 R828_ErrCode R828_IMR_Cross(void *pTuner, R828_SectType* IQ_Pont, UINT8* X_Direct)
2122 {
2123
2124         R828_SectType Compare_Cross[5]; //(0,0)(0,Q-1)(0,I-1)(Q-1,0)(I-1,0)
2125         R828_SectType Compare_Temp;
2126         UINT8 CrossCount;
2127     UINT8 Reg08;
2128         UINT8 Reg09;
2129
2130         CrossCount = 0;
2131     Reg08 = R828_iniArry[3] & 0xC0;
2132         Reg09 = R828_iniArry[4] & 0xC0;
2133
2134         //memset(&Compare_Temp,0, sizeof(R828_SectType));
2135         Compare_Temp.Gain_X = 0;
2136         Compare_Temp.Phase_Y = 0;
2137         Compare_Temp.Value = 0;
2138
2139         Compare_Temp.Value = 255;
2140
2141         for(CrossCount=0; CrossCount<5; CrossCount++)
2142         {
2143
2144                 if(CrossCount==0)
2145                 {
2146                   Compare_Cross[CrossCount].Gain_X = Reg08;
2147                   Compare_Cross[CrossCount].Phase_Y = Reg09;
2148                 }
2149                 else if(CrossCount==1)
2150                 {
2151                   Compare_Cross[CrossCount].Gain_X = Reg08;       //0
2152                   Compare_Cross[CrossCount].Phase_Y = Reg09 + 1;  //Q-1
2153                 }
2154                 else if(CrossCount==2)
2155                 {
2156                   Compare_Cross[CrossCount].Gain_X = Reg08;               //0
2157                   Compare_Cross[CrossCount].Phase_Y = (Reg09 | 0x20) + 1; //I-1
2158                 }
2159                 else if(CrossCount==3)
2160                 {
2161                   Compare_Cross[CrossCount].Gain_X = Reg08 + 1; //Q-1
2162                   Compare_Cross[CrossCount].Phase_Y = Reg09;
2163                 }
2164                 else
2165                 {
2166                   Compare_Cross[CrossCount].Gain_X = (Reg08 | 0x20) + 1; //I-1
2167                   Compare_Cross[CrossCount].Phase_Y = Reg09;
2168                 }
2169
2170         R828_I2C.RegAddr = 0x08;
2171             R828_I2C.Data    = Compare_Cross[CrossCount].Gain_X;
2172             if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2173                    return RT_Fail;
2174
2175             R828_I2C.RegAddr = 0x09;
2176             R828_I2C.Data    = Compare_Cross[CrossCount].Phase_Y;
2177             if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2178                   return RT_Fail;
2179
2180         if(R828_Muti_Read(pTuner, 0x01, &Compare_Cross[CrossCount].Value) != RT_Success)
2181                   return RT_Fail;
2182
2183                 if( Compare_Cross[CrossCount].Value < Compare_Temp.Value)
2184                 {
2185                   Compare_Temp.Value = Compare_Cross[CrossCount].Value;
2186                   Compare_Temp.Gain_X = Compare_Cross[CrossCount].Gain_X;
2187                   Compare_Temp.Phase_Y = Compare_Cross[CrossCount].Phase_Y;
2188                 }
2189         } //end for loop
2190
2191
2192     if((Compare_Temp.Phase_Y & 0x1F)==1)  //y-direction
2193         {
2194       *X_Direct = (UINT8) 0;
2195           IQ_Pont[0].Gain_X = Compare_Cross[0].Gain_X;
2196           IQ_Pont[0].Phase_Y = Compare_Cross[0].Phase_Y;
2197           IQ_Pont[0].Value = Compare_Cross[0].Value;
2198
2199           IQ_Pont[1].Gain_X = Compare_Cross[1].Gain_X;
2200           IQ_Pont[1].Phase_Y = Compare_Cross[1].Phase_Y;
2201           IQ_Pont[1].Value = Compare_Cross[1].Value;
2202
2203           IQ_Pont[2].Gain_X = Compare_Cross[2].Gain_X;
2204           IQ_Pont[2].Phase_Y = Compare_Cross[2].Phase_Y;
2205           IQ_Pont[2].Value = Compare_Cross[2].Value;
2206         }
2207         else //(0,0) or x-direction
2208         {
2209           *X_Direct = (UINT8) 1;
2210           IQ_Pont[0].Gain_X = Compare_Cross[0].Gain_X;
2211           IQ_Pont[0].Phase_Y = Compare_Cross[0].Phase_Y;
2212           IQ_Pont[0].Value = Compare_Cross[0].Value;
2213
2214           IQ_Pont[1].Gain_X = Compare_Cross[3].Gain_X;
2215           IQ_Pont[1].Phase_Y = Compare_Cross[3].Phase_Y;
2216           IQ_Pont[1].Value = Compare_Cross[3].Value;
2217
2218           IQ_Pont[2].Gain_X = Compare_Cross[4].Gain_X;
2219           IQ_Pont[2].Phase_Y = Compare_Cross[4].Phase_Y;
2220           IQ_Pont[2].Value = Compare_Cross[4].Value;
2221         }
2222         return RT_Success;
2223 }
2224
2225 //----------------------------------------------------------------------------------------//
2226 // purpose: search surrounding points from previous point
2227 //          try (x-1), (x), (x+1) columns, and find min IMR result point
2228 // input: IQ_Pont: previous point data(IMR Gain, Phase, ADC Result, RefRreq)
2229 //                 will be updated to final best point
2230 // output: TRUE or FALSE
2231 //----------------------------------------------------------------------------------------//
2232 R828_ErrCode R828_F_IMR(void *pTuner, R828_SectType* IQ_Pont)
2233 {
2234         R828_SectType Compare_IQ[3];
2235         R828_SectType Compare_Bet[3];
2236         UINT8 VGA_Count;
2237         UINT16 VGA_Read;
2238
2239         VGA_Count = 0;
2240         VGA_Read = 0;
2241
2242         //VGA
2243         for(VGA_Count = 12;VGA_Count < 16;VGA_Count ++)
2244         {
2245                 R828_I2C.RegAddr = 0x0C;
2246         R828_I2C.Data    = (R828_Arry[7] & 0xF0) + VGA_Count;
2247                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2248                         return RT_Fail;
2249
2250                 R828_Delay_MS(pTuner, 10);
2251
2252                 if(R828_Muti_Read(pTuner, 0x01, &VGA_Read) != RT_Success)
2253                         return RT_Fail;
2254
2255                 if(VGA_Read > 40*4)
2256                 break;
2257         }
2258
2259         //Try X-1 column and save min result to Compare_Bet[0]
2260         if((IQ_Pont->Gain_X & 0x1F) == 0x00)
2261         {
2262                 Compare_IQ[0].Gain_X = ((IQ_Pont->Gain_X) & 0xDF) + 1;  //Q-path, Gain=1
2263         }
2264         else
2265                 Compare_IQ[0].Gain_X  = IQ_Pont->Gain_X - 1;  //left point
2266         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2267
2268         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)  // y-direction
2269                 return RT_Fail;
2270
2271         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2272                 return RT_Fail;
2273
2274         Compare_Bet[0].Gain_X = Compare_IQ[0].Gain_X;
2275         Compare_Bet[0].Phase_Y = Compare_IQ[0].Phase_Y;
2276         Compare_Bet[0].Value = Compare_IQ[0].Value;
2277
2278         //Try X column and save min result to Compare_Bet[1]
2279         Compare_IQ[0].Gain_X = IQ_Pont->Gain_X;
2280         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2281
2282         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)
2283                 return RT_Fail;
2284
2285         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2286                 return RT_Fail;
2287
2288         Compare_Bet[1].Gain_X = Compare_IQ[0].Gain_X;
2289         Compare_Bet[1].Phase_Y = Compare_IQ[0].Phase_Y;
2290         Compare_Bet[1].Value = Compare_IQ[0].Value;
2291
2292         //Try X+1 column and save min result to Compare_Bet[2]
2293         if((IQ_Pont->Gain_X & 0x1F) == 0x00)
2294                 Compare_IQ[0].Gain_X = ((IQ_Pont->Gain_X) | 0x20) + 1;  //I-path, Gain=1
2295         else
2296             Compare_IQ[0].Gain_X = IQ_Pont->Gain_X + 1;
2297         Compare_IQ[0].Phase_Y = IQ_Pont->Phase_Y;
2298
2299         if(R828_IQ_Tree(pTuner, Compare_IQ[0].Gain_X, Compare_IQ[0].Phase_Y, 0x08, &Compare_IQ[0]) != RT_Success)
2300                 return RT_Fail;
2301
2302         if(R828_CompreCor(&Compare_IQ[0]) != RT_Success)
2303                 return RT_Fail;
2304
2305         Compare_Bet[2].Gain_X = Compare_IQ[0].Gain_X;
2306         Compare_Bet[2].Phase_Y = Compare_IQ[0].Phase_Y;
2307         Compare_Bet[2].Value = Compare_IQ[0].Value;
2308
2309         if(R828_CompreCor(&Compare_Bet[0]) != RT_Success)
2310                 return RT_Fail;
2311
2312         *IQ_Pont = Compare_Bet[0];
2313
2314         return RT_Success;
2315 }
2316
2317 R828_ErrCode R828_GPIO(void *pTuner, R828_GPIO_Type R828_GPIO_Conrl)
2318 {
2319         if(R828_GPIO_Conrl == HI_SIG)
2320                 R828_Arry[10] |= 0x01;
2321         else
2322                 R828_Arry[10] &= 0xFE;
2323
2324         R828_I2C.RegAddr = 0x0F;
2325         R828_I2C.Data    = R828_Arry[10];
2326         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2327                 return RT_Fail;
2328
2329         return RT_Success;
2330 }
2331
2332 R828_ErrCode R828_SetStandard(void *pTuner, R828_Standard_Type RT_Standard)
2333 {
2334
2335         // Used Normal Arry to Modify
2336         UINT8 ArrayNum;
2337
2338         ArrayNum = 27;
2339         for(ArrayNum=0;ArrayNum<27;ArrayNum++)
2340         {
2341                 R828_Arry[ArrayNum] = R828_iniArry[ArrayNum];
2342         }
2343
2344
2345         // Record Init Flag & Xtal_check Result
2346         if(R828_IMR_done_flag == TRUE)
2347         R828_Arry[7]    = (R828_Arry[7] & 0xF0) | 0x01 | (Xtal_cap_sel<<1);
2348         else
2349             R828_Arry[7]    = (R828_Arry[7] & 0xF0) | 0x00;
2350
2351         R828_I2C.RegAddr = 0x0C;
2352     R828_I2C.Data    = R828_Arry[7];
2353     if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2354        return RT_Fail;
2355
2356         // Record version
2357         R828_I2C.RegAddr = 0x13;
2358         R828_Arry[14]    = (R828_Arry[14] & 0xC0) | VER_NUM;
2359         R828_I2C.Data    = R828_Arry[14];
2360         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2361             return RT_Fail;
2362
2363
2364     //for LT Gain test
2365         if(RT_Standard > SECAM_L1)
2366         {
2367                 R828_I2C.RegAddr = 0x1D;  //[5:3] LNA TOP
2368                 R828_I2C.Data = (R828_Arry[24] & 0xC7) | 0x00;
2369             if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2370                     return RT_Fail;
2371
2372                 //R828_Delay_MS(1);
2373         }
2374
2375         // Look Up System Dependent Table
2376         Sys_Info1 = R828_Sys_Sel(RT_Standard);
2377         R828_IF_khz = Sys_Info1.IF_KHz;
2378         R828_CAL_LO_khz = Sys_Info1.FILT_CAL_LO;
2379
2380         // Filter Calibration
2381     if(R828_Fil_Cal_flag[RT_Standard] == FALSE)
2382         {
2383                 // do filter calibration
2384                 if(R828_Filt_Cal(pTuner, Sys_Info1.FILT_CAL_LO,Sys_Info1.BW) != RT_Success)
2385                     return RT_Fail;
2386
2387
2388                 // read and set filter code
2389                 R828_I2C_Len.RegAddr = 0x00;
2390                 R828_I2C_Len.Len     = 5;
2391                 if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
2392                         return RT_Fail;
2393
2394                 R828_Fil_Cal_code[RT_Standard] = R828_I2C_Len.Data[4] & 0x0F;
2395
2396                 //Filter Cali. Protection
2397                 if(R828_Fil_Cal_code[RT_Standard]==0 || R828_Fil_Cal_code[RT_Standard]==15)
2398                 {
2399                    if(R828_Filt_Cal(pTuner, Sys_Info1.FILT_CAL_LO,Sys_Info1.BW) != RT_Success)
2400                            return RT_Fail;
2401
2402                    R828_I2C_Len.RegAddr = 0x00;
2403                    R828_I2C_Len.Len     = 5;
2404                    if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
2405                            return RT_Fail;
2406
2407                    R828_Fil_Cal_code[RT_Standard] = R828_I2C_Len.Data[4] & 0x0F;
2408
2409                    if(R828_Fil_Cal_code[RT_Standard]==15) //narrowest
2410                            R828_Fil_Cal_code[RT_Standard] = 0;
2411
2412                 }
2413         R828_Fil_Cal_flag[RT_Standard] = TRUE;
2414         }
2415
2416         // Set Filter Q
2417         R828_Arry[5]  = (R828_Arry[5] & 0xE0) | Sys_Info1.FILT_Q | R828_Fil_Cal_code[RT_Standard];
2418         R828_I2C.RegAddr  = 0x0A;
2419         R828_I2C.Data     = R828_Arry[5];
2420         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2421                 return RT_Fail;
2422
2423         // Set BW, Filter_gain, & HP corner
2424         R828_Arry[6]= (R828_Arry[6] & 0x10) | Sys_Info1.HP_COR;
2425         R828_I2C.RegAddr  = 0x0B;
2426         R828_I2C.Data     = R828_Arry[6];
2427         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2428                 return RT_Fail;
2429
2430         // Set Img_R
2431         R828_Arry[2]  = (R828_Arry[2] & 0x7F) | Sys_Info1.IMG_R;
2432         R828_I2C.RegAddr  = 0x07;
2433         R828_I2C.Data     = R828_Arry[2];
2434         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2435                 return RT_Fail;
2436
2437
2438         // Set filt_3dB, V6MHz
2439         R828_Arry[1]  = (R828_Arry[1] & 0xCF) | Sys_Info1.FILT_GAIN;
2440         R828_I2C.RegAddr  = 0x06;
2441         R828_I2C.Data     = R828_Arry[1];
2442         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2443                 return RT_Fail;
2444
2445     //channel filter extension
2446         R828_Arry[25]  = (R828_Arry[25] & 0x9F) | Sys_Info1.EXT_ENABLE;
2447         R828_I2C.RegAddr  = 0x1E;
2448         R828_I2C.Data     = R828_Arry[25];
2449         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2450                 return RT_Fail;
2451
2452
2453         //Loop through
2454         R828_Arry[0]  = (R828_Arry[0] & 0x7F) | Sys_Info1.LOOP_THROUGH;
2455         R828_I2C.RegAddr  = 0x05;
2456         R828_I2C.Data     = R828_Arry[0];
2457         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2458                 return RT_Fail;
2459
2460         //Loop through attenuation
2461         R828_Arry[26]  = (R828_Arry[26] & 0x7F) | Sys_Info1.LT_ATT;
2462         R828_I2C.RegAddr  = 0x1F;
2463         R828_I2C.Data     = R828_Arry[26];
2464         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2465                 return RT_Fail;
2466
2467     //filter extention widest
2468         R828_Arry[10]  = (R828_Arry[10] & 0x7F) | Sys_Info1.FLT_EXT_WIDEST;
2469         R828_I2C.RegAddr  = 0x0F;
2470         R828_I2C.Data     = R828_Arry[10];
2471         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2472                 return RT_Fail;
2473
2474         //RF poly filter current
2475         R828_Arry[20]  = (R828_Arry[20] & 0x9F) | Sys_Info1.POLYFIL_CUR;
2476         R828_I2C.RegAddr  = 0x19;
2477         R828_I2C.Data     = R828_Arry[20];
2478         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2479                 return RT_Fail;
2480
2481         return RT_Success;
2482 }
2483
2484 R828_ErrCode R828_Filt_Cal(void *pTuner, UINT32 Cal_Freq,BW_Type R828_BW)
2485 {
2486           //set in Sys_sel()
2487         /*
2488         if(R828_BW == BW_8M)
2489         {
2490                 //set filt_cap = no cap
2491                 R828_I2C.RegAddr = 0x0B;  //reg11
2492                 R828_Arry[6]   &= 0x9F;  //filt_cap = no cap
2493                 R828_I2C.Data    = R828_Arry[6];
2494         }
2495         else if(R828_BW == BW_7M)
2496         {
2497                 //set filt_cap = +1 cap
2498                 R828_I2C.RegAddr = 0x0B;  //reg11
2499                 R828_Arry[6]   &= 0x9F;  //filt_cap = no cap
2500                 R828_Arry[6]   |= 0x20;  //filt_cap = +1 cap
2501                 R828_I2C.Data    = R828_Arry[6];
2502         }
2503         else if(R828_BW == BW_6M)
2504         {
2505                 //set filt_cap = +2 cap
2506                 R828_I2C.RegAddr = 0x0B;  //reg11
2507                 R828_Arry[6]   &= 0x9F;  //filt_cap = no cap
2508                 R828_Arry[6]   |= 0x60;  //filt_cap = +2 cap
2509                 R828_I2C.Data    = R828_Arry[6];
2510         }
2511
2512
2513     if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2514                 return RT_Fail;
2515 */
2516
2517     // Set filt_cap
2518         R828_I2C.RegAddr  = 0x0B;
2519         R828_Arry[6]= (R828_Arry[6] & 0x9F) | (Sys_Info1.HP_COR & 0x60);
2520         R828_I2C.Data     = R828_Arry[6];
2521         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2522                 return RT_Fail;
2523
2524
2525         //set cali clk =on
2526         R828_I2C.RegAddr = 0x0F;  //reg15
2527         R828_Arry[10]   |= 0x04;  //calibration clk=on
2528         R828_I2C.Data    = R828_Arry[10];
2529         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2530                 return RT_Fail;
2531
2532         //X'tal cap 0pF for PLL
2533         R828_I2C.RegAddr = 0x10;
2534         R828_Arry[11]    = (R828_Arry[11] & 0xFC) | 0x00;
2535         R828_I2C.Data    = R828_Arry[11];
2536         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2537                 return RT_Fail;
2538
2539         //Set PLL Freq = Filter Cali Freq
2540         if(R828_PLL(pTuner, Cal_Freq * 1000, STD_SIZE) != RT_Success)
2541                 return RT_Fail;
2542
2543         //Start Trigger
2544         R828_I2C.RegAddr = 0x0B;        //reg11
2545         R828_Arry[6]   |= 0x10;     //vstart=1
2546         R828_I2C.Data    = R828_Arry[6];
2547         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2548                 return RT_Fail;
2549
2550         //delay 0.5ms
2551         R828_Delay_MS(pTuner, 1);
2552
2553         //Stop Trigger
2554         R828_I2C.RegAddr = 0x0B;
2555         R828_Arry[6]   &= 0xEF;     //vstart=0
2556         R828_I2C.Data    = R828_Arry[6];
2557         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2558                 return RT_Fail;
2559
2560
2561         //set cali clk =off
2562         R828_I2C.RegAddr  = 0x0F;       //reg15
2563         R828_Arry[10]    &= 0xFB;       //calibration clk=off
2564         R828_I2C.Data     = R828_Arry[10];
2565         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2566                 return RT_Fail;
2567
2568         return RT_Success;
2569
2570 }
2571
2572 R828_ErrCode R828_SetFrequency(void *pTuner, R828_Set_Info R828_INFO, R828_SetFreq_Type R828_SetFreqMode)
2573 {
2574         UINT32  LO_Hz;
2575
2576 #if 0
2577      // Check Input Frequency Range
2578          if((R828_INFO.RF_KHz<40000) || (R828_INFO.RF_KHz>900000))
2579          {
2580                   return RT_Fail;
2581          }
2582 #endif
2583
2584          if(R828_INFO.R828_Standard==SECAM_L1)
2585                 LO_Hz = R828_INFO.RF_Hz - (Sys_Info1.IF_KHz * 1000);
2586          else
2587                 LO_Hz = R828_INFO.RF_Hz + (Sys_Info1.IF_KHz * 1000);
2588
2589          //Set MUX dependent var. Must do before PLL( )
2590      if(R828_MUX(pTuner, LO_Hz/1000) != RT_Success)
2591         return RT_Fail;
2592
2593      //Set PLL
2594      if(R828_PLL(pTuner, LO_Hz, R828_INFO.R828_Standard) != RT_Success)
2595         return RT_Fail;
2596
2597      R828_IMR_point_num = Freq_Info1.IMR_MEM;
2598
2599
2600      //Set TOP,VTH,VTL
2601      SysFreq_Info1 = R828_SysFreq_Sel(R828_INFO.R828_Standard, R828_INFO.RF_KHz);
2602
2603
2604      // write DectBW, pre_dect_TOP
2605      R828_Arry[24] = (R828_Arry[24] & 0x38) | (SysFreq_Info1.LNA_TOP & 0xC7);
2606      R828_I2C.RegAddr = 0x1D;
2607      R828_I2C.Data = R828_Arry[24];
2608      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2609          return RT_Fail;
2610
2611      // write MIXER TOP, TOP+-1
2612      R828_Arry[23] = (R828_Arry[23] & 0x07) | (SysFreq_Info1.MIXER_TOP & 0xF8);
2613      R828_I2C.RegAddr = 0x1C;
2614      R828_I2C.Data = R828_Arry[23];
2615      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2616         return RT_Fail;
2617
2618
2619      // write LNA VTHL
2620      R828_Arry[8] = (R828_Arry[8] & 0x00) | SysFreq_Info1.LNA_VTH_L;
2621      R828_I2C.RegAddr = 0x0D;
2622      R828_I2C.Data = R828_Arry[8];
2623      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2624         return RT_Fail;
2625
2626      // write MIXER VTHL
2627      R828_Arry[9] = (R828_Arry[9] & 0x00) | SysFreq_Info1.MIXER_VTH_L;
2628      R828_I2C.RegAddr = 0x0E;
2629      R828_I2C.Data = R828_Arry[9];
2630      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2631         return RT_Fail;
2632
2633          // Cable-1/Air in
2634          R828_I2C.RegAddr = 0x05;
2635          R828_Arry[0] &= 0x9F;
2636          R828_Arry[0] |= SysFreq_Info1.AIR_CABLE1_IN;
2637          R828_I2C.Data = R828_Arry[0];
2638          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2639                 return RT_Fail;
2640
2641          // Cable-2 in
2642          R828_I2C.RegAddr = 0x06;
2643          R828_Arry[1] &= 0xF7;
2644          R828_Arry[1] |= SysFreq_Info1.CABLE2_IN;
2645          R828_I2C.Data = R828_Arry[1];
2646          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2647                 return RT_Fail;
2648
2649      //CP current
2650          R828_I2C.RegAddr = 0x11;
2651          R828_Arry[12] &= 0xC7;
2652          R828_Arry[12] |= SysFreq_Info1.CP_CUR;
2653          R828_I2C.Data = R828_Arry[12];
2654          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2655                  return RT_Fail;
2656
2657          //div buffer current
2658          R828_I2C.RegAddr = 0x17;
2659          R828_Arry[18] &= 0xCF;
2660          R828_Arry[18] |= SysFreq_Info1.DIV_BUF_CUR;
2661          R828_I2C.Data = R828_Arry[18];
2662          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2663                  return RT_Fail;
2664
2665          // Set channel filter current
2666          R828_I2C.RegAddr  = 0x0A;
2667          R828_Arry[5]  = (R828_Arry[5] & 0x9F) | SysFreq_Info1.FILTER_CUR;
2668          R828_I2C.Data     = R828_Arry[5];
2669      if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2670          return RT_Fail;
2671
2672      //Air-In only for Astrometa
2673          R828_Arry[0] =  (R828_Arry[0] & 0x9F) | 0x00;
2674      R828_Arry[1] =  (R828_Arry[1] & 0xF7) | 0x00;
2675
2676          R828_I2C.RegAddr = 0x05;
2677      R828_I2C.Data = R828_Arry[0];
2678          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2679                         return RT_Fail;
2680
2681          R828_I2C.RegAddr = 0x06;
2682      R828_I2C.Data = R828_Arry[1];
2683          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2684                         return RT_Fail;
2685
2686      //Set LNA
2687          if(R828_INFO.R828_Standard > SECAM_L1)
2688          {
2689
2690                  if(R828_SetFreqMode==FAST_MODE)       //FAST mode
2691                  {
2692                          //R828_Arry[24] = (R828_Arry[24] & 0xC7) | 0x20; //LNA TOP:4
2693                          R828_Arry[24] = (R828_Arry[24] & 0xC7) | 0x00; //LNA TOP:lowest
2694                          R828_I2C.RegAddr = 0x1D;
2695                          R828_I2C.Data = R828_Arry[24];
2696                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2697                                  return RT_Fail;
2698
2699                          R828_Arry[23] = (R828_Arry[23] & 0xFB);  // 0: normal mode
2700                          R828_I2C.RegAddr = 0x1C;
2701                          R828_I2C.Data = R828_Arry[23];
2702                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2703                                 return RT_Fail;
2704
2705                          R828_Arry[1]  = (R828_Arry[1] & 0xBF);   //0: PRE_DECT off
2706                          R828_I2C.RegAddr  = 0x06;
2707                          R828_I2C.Data     = R828_Arry[1];
2708                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2709                                 return RT_Fail;
2710
2711                          //agc clk 250hz
2712                          R828_Arry[21]  = (R828_Arry[21] & 0xCF) | 0x30;
2713                          R828_I2C.RegAddr  = 0x1A;
2714                          R828_I2C.Data     = R828_Arry[21];
2715                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2716                                 return RT_Fail;
2717                  }
2718                  else  //NORMAL mode
2719                  {
2720
2721                          R828_Arry[24] = (R828_Arry[24] & 0xC7) | 0x00; //LNA TOP:lowest
2722                          R828_I2C.RegAddr = 0x1D;
2723                          R828_I2C.Data = R828_Arry[24];
2724                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2725                                  return RT_Fail;
2726
2727                          R828_Arry[23] = (R828_Arry[23] & 0xFB);  // 0: normal mode
2728                          R828_I2C.RegAddr = 0x1C;
2729                          R828_I2C.Data = R828_Arry[23];
2730                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2731                                 return RT_Fail;
2732
2733                          R828_Arry[1]  = (R828_Arry[1] & 0xBF);   //0: PRE_DECT off
2734                          R828_I2C.RegAddr  = 0x06;
2735                          R828_I2C.Data     = R828_Arry[1];
2736                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2737                                 return RT_Fail;
2738
2739              //agc clk 250hz
2740                          R828_Arry[21]  = (R828_Arry[21] & 0xCF) | 0x30;   //250hz
2741                          R828_I2C.RegAddr  = 0x1A;
2742                          R828_I2C.Data     = R828_Arry[21];
2743                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2744                                 return RT_Fail;
2745
2746                          R828_Delay_MS(pTuner, 250);
2747
2748                          // PRE_DECT on
2749                          /*
2750                          R828_Arry[1]  = (R828_Arry[1] & 0xBF) | SysFreq_Info1.PRE_DECT;
2751                          R828_I2C.RegAddr  = 0x06;
2752                          R828_I2C.Data     = R828_Arry[1];
2753                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2754                                 return RT_Fail;
2755              */
2756                          // write LNA TOP = 3
2757                          //R828_Arry[24] = (R828_Arry[24] & 0xC7) | (SysFreq_Info1.LNA_TOP & 0x38);
2758                          R828_Arry[24] = (R828_Arry[24] & 0xC7) | 0x18;  //TOP=3
2759                          R828_I2C.RegAddr = 0x1D;
2760                          R828_I2C.Data = R828_Arry[24];
2761                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2762                                  return RT_Fail;
2763
2764                          // write discharge mode
2765                          R828_Arry[23] = (R828_Arry[23] & 0xFB) | (SysFreq_Info1.MIXER_TOP & 0x04);
2766                          R828_I2C.RegAddr = 0x1C;
2767                          R828_I2C.Data = R828_Arry[23];
2768                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2769                                 return RT_Fail;
2770
2771                          // LNA discharge current
2772                          R828_Arry[25]  = (R828_Arry[25] & 0xE0) | SysFreq_Info1.LNA_DISCHARGE;
2773                          R828_I2C.RegAddr  = 0x1E;
2774                          R828_I2C.Data     = R828_Arry[25];
2775                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2776                                 return RT_Fail;
2777
2778                          //agc clk 60hz
2779                          R828_Arry[21]  = (R828_Arry[21] & 0xCF) | 0x20;
2780                          R828_I2C.RegAddr  = 0x1A;
2781                          R828_I2C.Data     = R828_Arry[21];
2782                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2783                                 return RT_Fail;
2784                  }
2785          }
2786          else
2787          {
2788                  if(R828_SetFreqMode==NORMAL_MODE || R828_SetFreqMode==FAST_MODE)
2789                  {
2790                          /*
2791              // PRE_DECT on
2792                          R828_Arry[1]  = (R828_Arry[1] & 0xBF) | SysFreq_Info1.PRE_DECT;
2793                          R828_I2C.RegAddr  = 0x06;
2794                          R828_I2C.Data     = R828_Arry[1];
2795                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2796                                 return RT_Fail;
2797              */
2798                           // PRE_DECT off
2799                          R828_Arry[1]  = (R828_Arry[1] & 0xBF);   //0: PRE_DECT off
2800                          R828_I2C.RegAddr  = 0x06;
2801                          R828_I2C.Data     = R828_Arry[1];
2802                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2803                                 return RT_Fail;
2804
2805                          // write LNA TOP
2806                          R828_Arry[24] = (R828_Arry[24] & 0xC7) | (SysFreq_Info1.LNA_TOP & 0x38);
2807                          R828_I2C.RegAddr = 0x1D;
2808                          R828_I2C.Data = R828_Arry[24];
2809                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2810                                  return RT_Fail;
2811
2812                          // write discharge mode
2813                          R828_Arry[23] = (R828_Arry[23] & 0xFB) | (SysFreq_Info1.MIXER_TOP & 0x04);
2814                          R828_I2C.RegAddr = 0x1C;
2815                          R828_I2C.Data = R828_Arry[23];
2816                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2817                                 return RT_Fail;
2818
2819                          // LNA discharge current
2820                          R828_Arry[25]  = (R828_Arry[25] & 0xE0) | SysFreq_Info1.LNA_DISCHARGE;
2821                          R828_I2C.RegAddr  = 0x1E;
2822                          R828_I2C.Data     = R828_Arry[25];
2823                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2824                                 return RT_Fail;
2825
2826                          // agc clk 1Khz, external det1 cap 1u
2827                          R828_Arry[21]  = (R828_Arry[21] & 0xCF) | 0x00;
2828                          R828_I2C.RegAddr  = 0x1A;
2829                          R828_I2C.Data     = R828_Arry[21];
2830                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2831                                 return RT_Fail;
2832
2833                          R828_Arry[11]  = (R828_Arry[11] & 0xFB) | 0x00;
2834                          R828_I2C.RegAddr  = 0x10;
2835                          R828_I2C.Data     = R828_Arry[11];
2836                          if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2837                                 return RT_Fail;
2838                  }
2839          }
2840
2841      return RT_Success;
2842
2843 }
2844
2845 R828_ErrCode R828_Standby(void *pTuner, R828_LoopThrough_Type R828_LoopSwitch)
2846 {
2847         if(R828_LoopSwitch == LOOP_THROUGH)
2848         {
2849                 R828_I2C.RegAddr = 0x06;
2850                 R828_I2C.Data    = 0xB1;
2851                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2852                         return RT_Fail;
2853                 R828_I2C.RegAddr = 0x05;
2854                 R828_I2C.Data = 0x03;
2855
2856
2857                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2858                 return RT_Fail;
2859         }
2860         else
2861         {
2862                 R828_I2C.RegAddr = 0x05;
2863                 R828_I2C.Data    = 0xA3;
2864                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2865                         return RT_Fail;
2866
2867                 R828_I2C.RegAddr = 0x06;
2868                 R828_I2C.Data    = 0xB1;
2869                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2870                         return RT_Fail;
2871         }
2872
2873         R828_I2C.RegAddr = 0x07;
2874         R828_I2C.Data    = 0x3A;
2875         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2876                 return RT_Fail;
2877
2878         R828_I2C.RegAddr = 0x08;
2879         R828_I2C.Data    = 0x40;
2880         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2881                 return RT_Fail;
2882
2883         R828_I2C.RegAddr = 0x09;
2884         R828_I2C.Data    = 0xC0;   //polyfilter off
2885         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2886                 return RT_Fail;
2887
2888         R828_I2C.RegAddr = 0x0A;
2889         R828_I2C.Data    = 0x36;
2890         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2891                 return RT_Fail;
2892
2893         R828_I2C.RegAddr = 0x0C;
2894         R828_I2C.Data    = 0x35;
2895         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2896                 return RT_Fail;
2897
2898         R828_I2C.RegAddr = 0x0F;
2899         R828_I2C.Data    = 0x78;
2900         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2901                 return RT_Fail;
2902
2903         R828_I2C.RegAddr = 0x11;
2904         R828_I2C.Data    = 0x03;
2905         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2906                 return RT_Fail;
2907
2908         R828_I2C.RegAddr = 0x17;
2909         R828_I2C.Data    = 0xF4;
2910         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2911                 return RT_Fail;
2912
2913         R828_I2C.RegAddr = 0x19;
2914         R828_I2C.Data    = 0x0C;
2915         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2916                 return RT_Fail;
2917
2918
2919         return RT_Success;
2920 }
2921
2922 R828_ErrCode R828_GetRfGain(void *pTuner, R828_RF_Gain_Info *pR828_rf_gain)
2923 {
2924
2925         R828_I2C_Len.RegAddr = 0x00;
2926         R828_I2C_Len.Len     = 4;
2927         if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
2928                 return RT_Fail;
2929
2930         pR828_rf_gain->RF_gain1 = (R828_I2C_Len.Data[3] & 0x0F);
2931         pR828_rf_gain->RF_gain2 = ((R828_I2C_Len.Data[3] & 0xF0) >> 4);
2932         pR828_rf_gain->RF_gain_comb = pR828_rf_gain->RF_gain1*2 + pR828_rf_gain->RF_gain2;
2933
2934     return RT_Success;
2935 }
2936
2937
2938 /* measured with a Racal 6103E GSM test set at 928 MHz with -60 dBm
2939  * input power, for raw results see:
2940  * http://steve-m.de/projects/rtl-sdr/gain_measurement/r820t/
2941  */
2942
2943 #define VGA_BASE_GAIN   -47
2944 static const int r820t_vga_gain_steps[]  = {
2945         0, 26, 26, 30, 42, 35, 24, 13, 14, 32, 36, 34, 35, 37, 35, 36
2946 };
2947
2948 static const int r820t_lna_gain_steps[]  = {
2949         0, 9, 13, 40, 38, 13, 31, 22, 26, 31, 26, 14, 19, 5, 35, 13
2950 };
2951
2952 static const int r820t_mixer_gain_steps[]  = {
2953         0, 5, 10, 10, 19, 9, 10, 25, 17, 10, 8, 16, 13, 6, 3, -8
2954 };
2955
2956 R828_ErrCode R828_SetRfGain(void *pTuner, int gain)
2957 {
2958         int i, total_gain = 0;
2959         uint8_t mix_index = 0, lna_index = 0;
2960
2961         for (i = 0; i < 15; i++) {
2962                 if (total_gain >= gain)
2963                         break;
2964
2965                 total_gain += r820t_lna_gain_steps[++lna_index];
2966
2967                 if (total_gain >= gain)
2968                         break;
2969
2970                 total_gain += r820t_mixer_gain_steps[++mix_index];
2971         }
2972
2973         /* set LNA gain */
2974         R828_I2C.RegAddr = 0x05;
2975         R828_Arry[0] = (R828_Arry[0] & 0xF0) | lna_index;
2976         R828_I2C.Data = R828_Arry[0];
2977         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2978                 return RT_Fail;
2979
2980         /* set Mixer gain */
2981         R828_I2C.RegAddr = 0x07;
2982         R828_Arry[2] = (R828_Arry[2] & 0xF0) | mix_index;
2983         R828_I2C.Data = R828_Arry[2];
2984         if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
2985                 return RT_Fail;
2986
2987         return RT_Success;
2988 }
2989
2990 R828_ErrCode R828_RfGainMode(void *pTuner, int manual)
2991 {
2992         UINT8 MixerGain;
2993         UINT8 LnaGain;
2994
2995         MixerGain = 0;
2996         LnaGain = 0;
2997
2998         if (manual) {
2999                 //LNA auto off
3000              R828_I2C.RegAddr = 0x05;
3001              R828_Arry[0] = R828_Arry[0] | 0x10;
3002                  R828_I2C.Data = R828_Arry[0];
3003              if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3004                        return RT_Fail;
3005
3006                  //Mixer auto off
3007              R828_I2C.RegAddr = 0x07;
3008              R828_Arry[2] = R828_Arry[2] & 0xEF;
3009                  R828_I2C.Data = R828_Arry[2];
3010              if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3011                        return RT_Fail;
3012
3013                 R828_I2C_Len.RegAddr = 0x00;
3014                 R828_I2C_Len.Len     = 4;
3015                 if(I2C_Read_Len(pTuner, &R828_I2C_Len) != RT_Success)
3016                         return RT_Fail;
3017
3018                 /* set fixed VGA gain for now (16.3 dB) */
3019                 R828_I2C.RegAddr = 0x0C;
3020                 R828_Arry[7]    = (R828_Arry[7] & 0x60) | 0x08;
3021                 R828_I2C.Data    = R828_Arry[7];
3022                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3023                         return RT_Fail;
3024
3025
3026         } else {
3027             //LNA
3028              R828_I2C.RegAddr = 0x05;
3029              R828_Arry[0] = R828_Arry[0] & 0xEF;
3030                  R828_I2C.Data = R828_Arry[0];
3031              if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3032                        return RT_Fail;
3033
3034                  //Mixer
3035              R828_I2C.RegAddr = 0x07;
3036              R828_Arry[2] = R828_Arry[2] | 0x10;
3037                  R828_I2C.Data = R828_Arry[2];
3038              if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3039                        return RT_Fail;
3040
3041                 /* set fixed VGA gain for now (26.5 dB) */
3042                 R828_I2C.RegAddr = 0x0C;
3043                 R828_Arry[7]    = (R828_Arry[7] & 0x60) | 0x0B;
3044                 R828_I2C.Data    = R828_Arry[7];
3045                 if(I2C_Write(pTuner, &R828_I2C) != RT_Success)
3046                         return RT_Fail;
3047         }
3048
3049     return RT_Success;
3050 }